FlowAcc: Real-Time High-Accuracy DNN-based Optical Flow Accelerator in FPGA
Yehua Linga, Yuanxing Yanb, Kai Huangc and Gang Chend
School of Computer Science and Engineering, Sun Yat-sen University, China
alingyh6@mail2.sysu.edu.cn
byanyx8@mail2.sysu.edu.cn
chuangk36@mail.sysu.edu.cn
dcheng83@mail.sysu.edu.cn
ABSTRACT
Recently, accelerator architectures have been designed to use deep neural networks (DNNs) to accelerate computer vision tasks, possessing the advantages of both accuracy and speed. Optical flow accelerator is however not among these architectures that DNNs have been successfully deployed. Existing hardware accelerators for optical flow estimation are all designed for classic methods and generally perform poorly in estimated accuracy. In this paper, we present FlowAcc, a dedicated hardware accelerator for DNN-based optical flow estimation, adopting a pipelined hardware design for real-time processing of image streams. We design an efficient multiplexing binary neural network (BNN) architecture for pyramidal feature extraction to significantly reduce the hardware cost and make it independent of the pyramid level number. Furthermore, efficient hamming distance calculation and competent flow regularization are utilized for hierarchical optical flow estimation to greatly improve the system efficiency. Comprehensive experimental results demonstrate that FlowAcc achieves state-of-the-art estimation accuracy and real-time performance on the Middlebury dataset when compared with the existing optical flow accelerators.
Keywords: Optical flow, BNN, FPGA, real-time.
