FastGR : Global Routing on CPU-GPU with Heterogeneous Task Graph Scheduler
Siting Liu1,2, Peiyu Liao1,2, Rui Zhang3, Zhitang Chen4, Wenlong Lv4, Yibo Lin1 and Bei Yu2
1Peking University
2Chinese University of Hong Kong
3HiSilicon Technologies Co
4Huawei Noah’s Ark Lab
ABSTRACT
Routing is an essential step to integrated circuits (IC) design closure. With the rapid increase of design scales, routing has become the runtime bottleneck in the physical design flow. Thus, accelerating routing becomes a vital and urgent task for IC design automation. This paper proposes a global routing framework running on hybrid CPU-GPU platforms with a heterogeneous task scheduler and a GPU-accelerated pattern routing algorithm. We demonstrate that the task scheduler can lead to 2.307× speedup compared with the widely-adopted batch-based parallelization strategy on CPU and the GPU-accelerated pattern routing algorithm can contribute to 10.877× speedup over the sequential algorithm on CPU. Finally, the combined techniques can achieve 2.426× speedup without quality degradation compared with the state-of-the-art global router.
