coxHE: A Software-Hardware Co-Design Framework For FPGA Acceleration Of Homomorphic Computation
Mingqin Han1,2, Yilan Zhu1,2, Qian Lou3, Zimeng Zhou1, Shanqing Guo1 and Lei Ju1,2
1Key Laboratory of Cryptologic Technology and Information Security, Ministry of Education, Shandong University
2School of Cyber Science and Technology, Shandong University, Qingdao, China
3Intelligent Systems Engineering department, Indiana University, Bloomington, Indiana
ABSTRACT
Data privacy becomes a crucial concern in the AI and big data era. Fully homomorphic encryption (FHE) is a promising data privacy protection technique where the entire computation is performed on encrypted data. However, the dramatic increase of the computation workload restrains the usage of FHE for the real-world applications. In this paper, we propose an FPFA accelerator design framework for CKKS-based HE. While the KeySwitch operations are the primary performance bottleneck of FHE computation, we propose a low latency design of KeySwitch module with reduced intra-operation data dependency. Compared with the state-of-the-art FPGA based key-switch implementation that is based on Verilog, the proposed high-level synthesis (HLS) based design reduces the operation latency by 40%. Furthermore, we propose an automated design space exploration framework which generates optimal encryption parameters and accelerators for a given application kernel and the target FPGA device. Experimental results for a set of real HE application kernels on different FPGA devices show that our HLS-based flexible design framework produces substantially better accelerator design compared with a fixed-parameter HE accelerator in terms of security, approximation error, and overall performance.
Keywords: Homomorphic Encryption, Fpga Acceleration, High-Level Synthesis, Design Space Exploration.
