Routability-Aware Placement for Advanced FinFET Mixed-Signal Circuits using Satisfiability Modulo Theories
Hao Chen1,a, Walker J. Turner2,c, David Z. Pan1,b and Haoxing Ren2,d
1ECE Department, The University of Texas at Austin, Austin, TX, USA
ahaoc@utexas.edu
bdpan@ece.utexas.edu
2NVIDIA Corporation, USA
cwturner@nvidia.com
dhaoxingr@nvidia.com
ABSTRACT
Due to the increasingly complex design rules and geometric layout constraints within advanced FinFET nodes, automated placement of full-custom analog/mixed-signal (AMS) designs has become increasingly challenging. Compared with traditional planar nodes, AMS circuit layout is dramatically different for FinFET technologies due to strict design rules and grid-based restrictions for both placement and routing. This limits previous analog placement approaches in effectively handling all of the new constraints while adhering to the new layout style. Additionally, limited work has demonstrated effective routability modeling, which is crucial for successful routing. This paper presents a robust analog placement framework using satisfiability modulo theories (SMT) for efficient constraint handling and routability modeling. Experimental results based on industrial designs show the effectiveness of the proposed framework in optimizing placement metrics while satisfying the specified constraints.
