Know Your Neighbor: Physically Locating Xeon Processor Cores on the Core Tile Grid
Hyungmin Cho
Department of Computer Science and Engineering Sungkyunkwan University, Suwon, Republic of Korea
hyungmin.cho@skku.edu
ABSTRACT
The physical locations of the processor cores in multior many-core CPUs are often hidden from the users. The current generation Intel Xeon CPUs accommodate many processor cores on a tile grid, but the exact locations of the individual cores are not plainly visible. We present a methodology for physically locating the cores in the Intel Xeon CPUs. Using the method, we collect core location samples of 300 CPU instances deployed in a commercial cloud platform, which reveal a wide variety of core map patterns. The locations of the individual processor cores are not contiguously mapped, and the mapping pattern can be different per each CPU instance.
We also demonstrate that an attacker can exploit an intercore thermal covert channel using the identified core locations. The attacker can increase the channel capacity by strategically placing multiple sender and receiver nodes. Our evaluation shows that up to 15 bps of data transfer is possible with less than 1% of bit error rate on a cloud environment, which is 3 times higher than the previously reported results.
Keywords: Topology, Network On Chip, Covert Channel.
