Design and Validation of Photonic IP Macros Based On Foundry PDKS

Ruping Cao, François Chabert and Pieter Dumon
Luceda Photonics, BE

ABSTRACT

Silicon photonic foundry PDKs are steadily maturing. On the basis of these, designers can start to design and validate more complex circuits. Successful prototypes and productization depend however on a tight integration of the design flow, across hierarchical levels and between layout and simulation model extraction. Circuit performance and yield is impacted by fabrication variability and needs to be taken into account in the design cycle already at prototype level. We will show how a fully flow with integrated layout, circuit and building block simulation can speed up design and validation of larger photonic macros and discuss PDK requirements.