Tango: An Optimizing Compiler for Just-In-Time RTL Simulation
Blaise-Pascal Tinea, Sudhakar Yalamanchilib and Hyesoon Kimc
Georgia Tech Atlanta, Georgia
ablaise.tine@gatech.edu
bsudah@gatech.edu
chyesoon@cc.gatech.edu
ABSTRACT
With Moore’s law coming to an end, the advent of hardware specialization presents a unique challenge for a much tighter software and hardware co-design environment to exploit domain-specific optimizations and increase design efficiency. This trend is further accentuated by rapid-pace of innovations in Machine Learning and Graph Analytic, calling for a faster product development cycle for hardware accelerators and the importance of addressing the increasing cost of hardware verification. The productivity of softwarehardware co-design relies upon better integration between the software and hardware design methodologies, but more importantly in the effectiveness of the design tools and hardware simulators at reducing the development time. In this work, we developed Tango, an Optimizing compiler for Just-in-Time RTL simulation. Tango implements unique hardware-centric compiler transformations to speed up runtime code generation in a software-hardware co-design environment where hardware simulation speed is critical. Tango achieves a 6 ×average speedup compared to the state-of-the-art simulators.
