III–V/Silicon Hybrid Lasers Integration On CMOS-Compatible 200mm And 300mm Platforms
Karim Hassan1, Szelag Bertrand2, Laetitia Adelmini2, Cecilia Dupre2, Elodie Ghegin3, Philippe Rodriguez2, Fabrice Nemouchi2, Pierre Brianceau2, Antoine Schembri2, David Carrara3, Pierrick Cavalie3, Florent Franchin3, Marie-Christine Roure2, Loic Sanchez2, Christophe Jany2 and Ségolène Olivier2
1CEA-Leti, FR
2STMicroelectronics, FR
3Almae Technologies, FR
ABSTRACT
We present a CMOS-compatible hybrid III-V/Silicon technology developed in CEA-Leti. Large-scale integration of silicon photonics is already available worldwide in 200mm or 300mm through different foundries, but the development of CMOS-compatible process for the III-V integration remains of major interest for next gen transceivers in the Datacom and High Performance Computing domains. The technological developments involve first the hybridization on top of a mature silicon photonic front-end wafer through direct molecular bonding, then the patterning of the III-V epitaxy layer, and low access resistance contacts though planar multilevel BEOL to be optimized. The different technological blocks will be described, and the results will be discussed on the basis of test vehicles based on either distributed feedback (DFB), distributed Bragg reflector (DBR), or Fabry-Perot (FP) laser cavities. While first demonstrations have been obtained through wafer bonding, we show that the fabrication process was subsequently validated on III-V dies bonding with a fabrication yield of Fabry-Perot lasers of 97% in 200mm. The overall technological features are expected improve the efficiency, density, and cost of silicon photonics PICs.
