Symmetry-based A/M-S BIST (SymBIST): Demonstration on a SAR ADC IP
Antonios Pavlidis1, Marie-Minerve Louërat1, Eric Faehn2, Anand Kumar3 and Haralampos-G. Stratigopoulos1
1Sorbonne Université, CNRS, LIP6, Paris, France
2ST Microelectronics, Crolles, France
3ST Microelectronics, Greater Noida, India
ABSTRACT
In this paper, we propose a defect-oriented Built-In Self-Test (BIST) paradigm for analog and mixed-signal (A/MS) Integrated Circuits (ICs), called symmetry-based BIST (Sym-BIST). SymBIST exploits inherent symmetries into the design to generate invariances that should hold true only in defect free operation. Violation of any of these invariances points to defect detection. We demonstrate SymBIST on a 65nm 10-bit Successive Approximation Register (SAR) Analog-to-Digital Converter (ADC) IP by ST Microelectronics.
