HcveAcc: A High-Performance and Energy-Efficient Accelerator for Tracking Task in VSLAM System
Renwei Li1,2, Junning Wu2, Meng Liu1,2,a, Zuding Chen1,2, Shengang Zhou1,2 and Shanggong Feng2
1Intelligent Robot-Processor Laboratory, Research Center for Brain-inspired Intelligence Institute of Automation, Chinese Academy of Sciences, Beijing, China
2Beijing Haawking Technology Co., Ltd.
aliumeng2013@ia.ac.cn
ABSTRACT
Visual SLAM (vSLAM) is a critical computer vision technology that is able to build a map of an unknown environment and perform location, simultaneously leveraging the partially built map. While existing several software SLAM processing frameworks, underlying general-purpose processors still hardly achieve the real-time SLAM at a reasonably low cost. In this paper, we propose HcveAcc, the first specialized CMOSbased hardware accelerator to help optimize the tracking task in the vSLAM system with high-performance and energy-efficient. Our HcveAcc targets to solve the time overhead bottleneck in the tracking process—high-density feature extraction and highprecision descriptor generation, and provides a configurable hardware architecture that handles higher resolution image data. We have implemented the HcveAcc in a 28nm CMOS technology using commercial EDA tools and evaluated it for the EuRoC and TUM dataset to demonstrate the robustness and accuracy in the SLAM tracking procedure. Our results show that HcveAcc achieves 4.3X speedup while consuming much less energy compared with state-of-the-art FPGA solutions.
