doi: 10.3850/978-3-9815370-4-8_0617

ABSTRACT

A method to realistically estimate the defect detection probability achieved by defect-oriented analog/RF integrated circuit tests at the circuit design level is presented in this paper. The proposed method also provides insight to the efficiency of the various available defect-oriented testing techniques, thus allowing the selection of the most suitable for a specific circuit. The effect of structural defects in the presence of process variations and device mismatches is taken into account, by the exploitation of the defect probability distributions and the statistical models of the used technology. Although the proposed methodology is generally applicable to the entire class of analog circuits, its application to simple RF circuits which consist of a few elements seems to be more practical, due to the affordable computational cost implied by circuits with shorter defect dictionaries. In order to obtain results without a reliability compromise, the number of required statistical simulation runs is reduced through regression. The application of the proposed method on a typical RF mixer, designed in a 0.18µm CMOS technology, is also presented.

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