doi: 10.3850/978-3-9815370-4-8_0582


An Energy-efficient Non-volatile In-memory Accelerator for Sparse-representation based Face Recognition


Yuhao Wang1, Hantao Huang1, Leibin Ni1, Hao Yu1, Mei Yan1, Chuliang Weng2, Wei Yang2 and Junfeng Zhao2

1School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore

2Shannon Laboratory, Huawei Technologies Co., Ltd, China

ABSTRACT

Data analytics such as face recognition involves large volume of image data, and hence leads to grand challenge on mobile platform design with strict power requirement. Emerging non-volatile STT-MRAM has the minimum leakage power and comparable speed to SRAM, and hence is considered as a promising candidate for data-oriented mobile computing. However, there exists significantly higher write-energy for STT-MRAM when compared to the SRAM. Based on the use of STTMRAM, this paper introduces an energy-efficient non-volatile in-memory accelerator for a sparse-representation based face recognition algorithm. We find that by projecting high-dimension image data to much lower dimension, the current scaling for STT-MRAM write operation can be applied aggressively, which leads to significant power reduction yet maintains quality-of-service for face recognition. Specifically, compared to a baseline with SRAM, leakage power and dynamic power are reduced by 91.4% and 79% respectively with only slight compromise on recognition rate.



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