Advanced Spintronic Memory and Logic For Non-Volatile Processors
Robert Perricone1,a, Ibrahim Ahmed2,d, Zhaoxin Liang2,e, Meghna G. Mankalale2,f, X. Sharon Hu1,b, Chris H. Kim2,g, Michael Niemier1,c, Sachin S. Sapatnekar2,h and Jian-Ping Wang2,i
1Department of Computer Science and Engineering, University of Notre Dame Notre Dame, IN 46556, USA.
arperrico@nd.edug
bshu@nd.edug
cmniemier@nd.edug
2Department of Electrical and Computer Engineering, University of Minnesota, Minneapolis, MN, USA.
dahmed589@umn.edu
ezxliang@umn.edu
fmanka018@umn.edu
gchriskim@umn.edu
hsachin@umn.edu
ijpwang@umn.edu
ABSTRACT
Many ultra-low power Internet of things (IoT) systems may be powered by energy harvested from ambient sources (e.g., solar radiation, thermal gradients, and WiFi). However, these energy sources can vary significantly in terms of their strengths and on/off patterns. For volatile systems, the intermittent nature of the energy sources necessitates the use of backup/recovery schemes to guarantee computational correctness and forward progress, which incur performance, area and energy overhead. Non-volatile (NV) processors based on spintronic devices, such as Spin-Transfer Torque (STT) memory and All-Spin-Logic (ASL), are more attractive alternatives. These NV devices are capable of achieving forward progress without relying on backup/recovery schemes. This work establishes a general framework for evaluating NV device-based processors for energy harvesting applications. Results demonstrate that NV spintronic processors can achieve significant energy savings (up to 83x) versus a hybrid CMOS (computation) and STT-RAM (backup) implementation.
