Embedded Systems to High Performance Computing using STT-MRAM
Sophiane Sennia, Thibaud Delobelleb, Odilia Coic, Pierre-Yves Peneaud, Lionel Torrese, Abdoulaye Gamatief, Pascal Benoitg and Gilles Sassatellih
University of Montpellier, LIRMM UMR CNRS 5506.
asenni@lirmm.fr
bdelobelle@lirmm.fr
ccoi@lirmm.fr
dpeneau@lirmm.fr
etorres@lirmm.fr
fgamatie@lirmm.fr
gbenoit@lirmm.fr
hsassatelli@lirmm.fr
ABSTRACT
The scaling limits of CMOS have pushed many researchers to explore alternative technologies for beyond CMOS circuits. In addition to the increased device variability and process complexity led by the continuous decreasing size of CMOS transistors, heat dissipation effects limit the density and speed of current systems-on-chip. For beyond CMOS systems, the emerging memory technology STT-MRAM is seen as a promising alternative solution. This paper shows first how STTMRAM can improve energy efficiency and reliability of future embedded systems. Then, a hybrid design exploration framework is presented to investigate the potential of STT-MRAM for high performance computing.
