READEX: Linking Two Ends of the Computing Continuum to Improve Energy-efficiency in Dynamic Applications

Per Gunnar Kjeldsberg1, Andreas Gocht2, Michael Gerndt3, Lubomir Riha4, Joseph Schuchart5 and Umbreen Sabir Mian2
1Department of Electronics and Telecommunications, Norwegian University of Science and Technology, Trondheim, Norway
2Center for Information Services and High Performance Computing, Technische Universität Dresden, Germany
3Chair of Computer Architectures, Technische Universität München, Germany
4IT4Innovations, Ostrava, Czech Republic
5High Performance Computing Center Stuttgart, Universität Stuttgart, Germany


In both the embedded systems and High Performance Computing domains, energy-efficiency has become one of the main design criteria. Efficiently utilizing the resources provided in computing systems ranging from embedded systems to current petascale and future Exascale HPC systems will be a challenging task. Suboptimal designs can potentially cause large amounts of underutilized resources and wasted energy. In both domains, a promising potential for improving efficiency of scalable applications stems from the significan behaviour, e.g., runtime alternation in application resource requirements and workloads. Manually detecting and leveraging this dynamism to improve performance and energy-efficiency is a tedious task that is commonly neglected by developers. However, using an automatic optimization approach, application dynamism can be analysed at design time and used to optimize system configurations at runtime.
The European Union Horizon 2020 READEX (Runtime Exploitation of Application Dynamism for Energy-efficient eXascale computing) project will develop a tools-aided auto-tuning methodology inspired by the system scenario methodology used in embedded systems. Dynamic behaviour of HPC applications will be exploited to achieve improved energy-efficiency and performance. Driven by a consortium of European experts from academia, HPC resource providers, and industry, the READEX project aims at developing the first of its kind generic framework to split design time and runtime automatic tuning while targeting heterogeneous system at the Exascale level. This paper describes plans for the project as well as early results achieved during its first year. Furthermore, it is shown how project results will be brought back into the embedded systems domain.

Full Text (PDF)