Embracing Approximate Computing for Energy-Efficient Motion Estimation in High Efficiency Video Coding
Walaa El-Harouni, Semeen Rehman3,a, Bharath Srinivas Prabakaran3, Akash Kumar3, Rehan Hafiz2 and Muhammad Shafique1
1Institute of Computer Engineering, Vienna University of Technology (TU Wien), Austria.
muhammad.shafique@tuwien.ac.at
2National University of Sciences and Technology, Islamabad, Pakistan
3Chair for Processor Design, TU Dresden, Germany.
asemeen.rehman@tu-dresden.de
ABSTRACT
Approximate Computing is an emerging paradigm for developing highly energy-efficient computing systems. It leverages the inherent resilience of applications to trade output quality with energy efficiency. In this paper, we present a novel approximate architecture for energy-efficient motion estimation (ME) in high efficiency video coding (HEVC). We synthesized our designs for both ASIC and FPGA design flows. ModelSim gate-level simulations are used for functional and timing verification. We comprehensively analyze the impact of heterogeneous approximation modes on the power/energy-quality tradeoffs for various video sequences. To facilitate reproducible results for comparisons and further research and development, the RTL and behavioral models of approximate SAD architectures and constituting approximate modules are made available at https://sourceforge.net/projects/lpaclib/.
Keywords: Approximate computing, Hardware accelerator, Motion estimation, HEVC, Video coding, Energy efficiency.
