Performance Evaluation and Design Trade-offs for Wireless-enabled SMART NoC

Karthi Duraisamya and Partha Pratim Pandeb
School of Electrical Engineering & Computer Science, Washington State University, Pullman USA.


SMART (Single-Cycle Multi-hop Asynchronous Repeated Traversal) NoC architectures enable single cycle data transfers, even between the physically far apart nodes. However, enabling single cycle hops over long distance restricts the achievable clock frequency of the system. In other words, increasing the NoC clock frequency lowers the number of hops that can be traversed in a single-cycle in a conventional SMART NoC. In this work, we demonstrate that by integrating wireless links and a novel look-ahead request mechanism in the SMART NoC, it is possible to enable low-latency and energy efficient data transfers, even when the system is designed with high clock frequencies. For the various applications considered in this work, the wireless-enabled SMART (WiSMART) NoC achieves on an average 33% reduction in message latency compared to the wireline SMART NoC. This network level improvement translates into 16% savings in full system energy-delay-product.

Keywords: Wireless NoC, Single-cycle Multi-Hop NoC.

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