Simulation-Based Design Procedure for sub 1V CMOS Current Reference
Dmitry Osipova and Steffen Paul
Institute of Electrodynamics and Microelectronics (ITEM), University of Bremen, Germany.
aosipov@item.uni-bremen.de
ABSTRACT
This paper presents a new compact low supply current reference and a simulation-based design procedure to establish the circuit parameters quickly and efficiently. To verify the proposed design procedure, two sub 1 V example circuits for two different reference current values (80 nA and 800 nA) were designed and simulated using 0.35 mm CMOS technology. The circuits are robust against supply voltage variation without the need for external bandgap. A line sensitivity of approximately 1-2%/V over the supply voltage range from sub 1 V is achieved in both cases. The simulated temperature coefficient (TC) values are 93 ppm/215C and 197 ppm/215C in the temperature range from 0215C to 120215C for the 800 nA and 80 nA references, respectively.
