Compact Modeling and Circuit-Level Simulation of Silicon Nanophotonic Interconnects
Rui Wu1,a, Yuyang Wang1, Zeyu Zhang1, Chong Zhang1, Clint L. Schow1, John E. Bowers1 and Kwang-Ting Cheng1,2
1Department of Electrical & Computer Engineering, University of California, Santa Barbara, CA, US.
aruiwu@ece.ucsb.edu
2School of Engineering, Hong Kong University of Science and Technology, Hong Kong /EADDRESS/
ABSTRACT
Nanophotonic interconnects have been playing an increasingly important role in the datacom regime. Greater integration of silicon photonics demands modeling and simulation support for design validation, optimization and design space exploration. In this work, we develop compact models for a number of key photonic devices, which are extensively validated by the measurement data of a fabricated optical network-on-chip (ONoC). Implemented in SPICE-compatible Verilog-A, the models are used in circuit-level simulations of full optical links. The simulation results match well with the measurement data. Our model library and simulation approach enable the electro-optical (EO) cosimulation, allowing designers to include photonic devices in the whole system design space, and to co-optimize the transmitter, interconnect, and receiver jointly.
