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doi: 10.7873/DATE.2015.0743
Race to Idle or Not: Balancing the Memory Sleep Time with DVS for Energy Minimization
Chenchen Fu, Minming Li and Chun Jason Xue
Department of Computer Science, City University of Hong Kong, Hong Kong
ABSTRACT
Reducing energy consumption is a critical problem
in most of the computing systems today. In recent years, dynamic
voltage scaling (DVS) has been often applied in the multi-core
processor systems. The leakage power of the main memory shared
by the multiple DVS cores is becoming a larger problem with technology
scaling. This paper focuses on minimizing the system-wide
energy consumption by applying DVS on each core and turning
the memory to sleep when all the cores have common idle time.
This work presents systematic analysis for the target problem
based on different system models and task models. For tasks
with common release time , optimal schemes are presented for
the systems both with and without considering the static power of
the cores. For the general task model, a heuristic online algorithm
is proposed. Furthermore, the scheme is extended to handle the
problem when the transition overhead between the active and
sleep modes is not negligible. The experimental results show that
the heuristic algorithm can reduce the energy consumption of the
overall system by 8.73% in average (up to 28.44%) compared to
a state-of-the-art multi-core DVS scheduling scheme.
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