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doi: 10.7873/DATE.2015.0014
Operational Fault Detection and Monitoring of a Memristor-Based LUT
T. Nandha Kumar1,a, Haider A.F. Almurib1,b and Fabrizio Lombardi2
1Department of Electrical & Electronic Eng., The University of Nottingham,
Malaysia.
anandhakumaar.t@nottingham.edu.my
bhaider.abbas@nottingham.edu.my
2Department of ECE, Northeastern University, Boston, USA.
lombardi@ece.neu.edu
ABSTRACT
This paper presents a method for operational
testing of a memristor-based memory look-up table (LUT). In the
proposed method, the deterioration of the memristors (as storage
elements of a LUT) is modeled based on the reduction of the
resistance range as observed in fabricated devices and recently
reported in the technical literature. A quiescent current
technique is used for testing the memristors when deterioration
results in a change of state, thus leading to an erroneous (faulty)
operation. An equivalent circuit model of the operational
deterioration for a memristor-based LUT is presented. In
addition to modeling and testing, the proposed method can be
utilized also for continuous monitoring of the LUT in the
presence of memristor deterioration in the LUT. The proposed
method is assessed using LTSPICE; extensive simulation results
are presented with respect to different operational features, such
as LUT dimension and range of resistance. These results show
that the proposed test method is scalable with LUT dimension
and highly efficient for testing and monitoring a LUT in the
presence of deteriorating multiple memristors.
Keywords: Memristor, Testing, Deterioration, Monitoring,
Quiescent current.
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