Date: Thursday 12 March 2020
Time: 08:30 - 10:00
Location / Room: Autrans

Chair:
Maha Kooli, CEA-Leti, FR

Co-Chair:
Alexandre Levisse, EPFL, CH

In-Memory Computing (IMC) represents new computing paradigm where computation happens at data location. Within the landscape of IMC approaches, non-von Neumann architectures seek to minimize data movement associated with computing. Artificial intelligence applications are one of the most promising use case of IMC since they are both compute- and memory-intensive. Running such applications on edge devices offers significant save of energy consumption and high-speed acceleration. This special session proposes to take the attendees along a journey through IMC solutions for Edge AI. This session will cover four different viewpoints of IMC for Edge AI with four talks: (i) Enabling flexible electronics very-Edge AI with IMC, (ii) design automation methodology for computational SRAM for energy efficient SIMD operations, (iii) circuit/architecture/application multiscale design and optimization methodologies for IMC architectures, and (iv) device circuit and architecture optimizations to enable PCM-based deep learning accelerators. The speakers come from three different continents (Asia, Europe, America) and four different countries (Singapore, France, USA, Switzerland). Two speakers are affiliated to academic institutes; one to industry; and one to an institute of technological research center. We strongly believe that the topic and especially selected talks are extremely hot topics in the community and will attract various people from different countries and affiliations, from both academia and industry. Furthermore, thanks to its cross layer nature, we believe that this session is tailored to touch a wide range of experts from device and circuit community up to system and application design community. We also believe that highlighting and discussing such design methodologies is a key point for high quality and high impact research. Following up previous occurrences and success of IMC-oriented sessions and panels in DAC2019 as well as in ISLPED2019, we believe that this topic is extremely hot in the community and will trigger fruitful interactions and, we hope, collaboration among the community. We thereby expect more than 60 attendees for this session. This session will be the object of two scientific papers that will be integrated with DATE proceedings in case of acceptance.

Time	Label	Presentation Title Authors
08:30	9.3.1	FLEDGE: FLEXIBLE EDGE PLATFORMS ENABLED BY IN-MEMORY COMPUTING Speaker: Kamalika Datta, Nanyang Technological University, SG Authors: Kamalika Datta1, Umesh Chand2, Arko Dutt1, Devendra Singh2, Aaron Thean2 and Mohamed M. Sabry1 1Nanyang Technological University, SG; 2National University of Singapore, SG Download Paper (PDF; Only available from the DATE venue WiFi)
08:50	9.3.2	COMPUTATIONAL SRAM DESIGN AUTOMATION USING PUSHED-RULE BITCELLS FOR ENERGY-EFFICIENT VECTOR PROCESSING Speaker: Maha Kooli, CEA-Leti, FR Authors: Jean-Philippe Noel1, Valentin Egloff1, Maha Kooli1, Roman Gauchi1, Jean-Michel Portal2, Henri-Pierre Charles1, Pascal Vivet1 and Bastien Giraud1 1CEA-Leti, FR; 2Aix-Marseille University, FR Download Paper (PDF; Only available from the DATE venue WiFi)
09:10	9.3.3	DEMONSTRATING IN-CACHE COMPUTING THANKS TO CROSS-LAYER DESIGN OPTIMIZATIONS Authors: Marco Rios, William Simon, Alexandre Levisse, Marina Zapater and David Atienza, EPFL, CH
09:35	9.3.4	DEVICE, CIRCUIT AND SOFTWARE INNOVATIONS TO MAKE DEEP LEARNING WITH ANALOG MEMORY A REALITY Authors: Pritish Narayanan, Stefano Ambrogio, Hsinyu Tsai, Katie Spoon and Geoffrey W. Burr, IBM Research, US
10:00		End of session