3.3 EU/ESA projects on Heterogeneous Computing

Time	Label	Presentation Title Authors
14:30	3.3.1	ESA ATHENA WFI ONBOARD ELECTRONICS - DISTRIBUTED CONTROL AND DATA PROCESSING (WORK IN PROGRESS IN THE PROJECT) Speaker: Markus Plattner, Max Planck Institute for extraterrestrial Physics, DE Authors: Markus Plattner¹, Sabine Ott¹, Jintin Tran¹, Christopher Mandla¹, Manfred Steller², Harald Jeszensky², Roland Ottensamer³, Jan-Christoph Tenzer⁴, Thomas Schanz⁴, Samuel Pliego⁴, Konrad Skup⁵, Denis Tcherniak⁶, Chris Thomas⁷, Julian Thornhill⁷ and Sebastian Albrecht¹ ¹Max Planck Institute for extraterrestrial Physics, DE; ²IWF - Space Research Institute, AT; ³TU Wien, AT; ⁴University of Tübingen, DE; ⁵CBK Warsaw, PL; ⁶Technical University of Denmark, DK; ⁷University of Leicester, GB Abstract Within this paper, we describe the control electronics and data processing architecture and functionality of the Wide Field Imager (WFI). WFI is one of two scientific instruments of the next European X-ray observatory ATHENA whose development started five years ago. Meanwhile, a conceptual design, development models and a number of technology development activities have been performed. Download Paper (PDF; Only available from the DATE venue WiFi)
15:00	3.3.2	LEGATO: LOW-ENERGY, SECURE, AND RESILIENTTOOLSET FOR HETEROGENEOUS COMPUTING Speaker: Valerio Schiavoni, University of Neuchâtel, CH Authors: Behzad Salami¹, Konstantinos Parasyris¹, Adrian Cristal¹, Osman Unsal¹, Xavier Martorell¹, Paul Carpenter¹, Raul De La Cruz¹, Leonardo Bautista¹, Daniel Jimenez¹, Carlos Alvarez¹, Saber Nabavi¹, Sergi Madonar¹, Miquel Pericàs², Pedro Trancoso², Mustafa Abduljabbar², Jing Chen², Pirah Noor Soomro², Madhavan Manivannan², Micha von dem Berge³, Stefan Krupop³, Frank Klawonn⁴, Amani Mihklafi⁴, Sigrun May⁴, Tobias Becker⁵, Georgi Gaydadjiev⁵, Hans Salomonsson⁶, Devdatt Dubhashi⁶, Oron Port⁷, Yoav Etsion⁸, Le Quoc Do⁹, Christof Fetzer⁹, Martin Kaiser¹⁰, Nils Kucza¹⁰, Jens Hagemeyer¹⁰, René Griessl¹⁰, Lennart Tigges¹⁰, Kevin Mika¹⁰, Arne Hüffmeier¹⁰, Marcelo Pasin¹¹, Valerio Schiavoni¹¹, Isabelly Rocha¹¹, Christian Göttel¹¹ and Pascal Felber¹¹ ¹BSC, ES; ²Chalmers, SE; ³Christmann Informationstechnik + Medien GmbH & Co. KG, DE; ⁴Helmholtz-Zentrum für Infektionsforschung GmbH, DE; ⁵MAXELER, GB; ⁶MIS, SE; ⁷TECHNION, IL; ⁸Technion, IL; ⁹TU Dresden, DE; ¹⁰UNIBI, DE; ¹¹UNINE, CH Abstract The LEGaTO project leverages task-based programming models to provide a software ecosystem for Made-in-Europe heterogeneous hardware composed of CPUs, GPUs, FPGAs and dataflow engines. The aim is to attain one order of magnitude energy savings from the edge to the converged cloud/HPC, balanced with the security and resilience challenges. LEGaTO is an ongoing three-year EU H2020 project started in December 2017. Download Paper (PDF; Only available from the DATE venue WiFi)
15:30	3.3.3	EFFICIENT COMPILATION AND EXECUTION OF JVM-BASED DATA PROCESSING FRAMEWORKS ON HETEROGENEOUS CO-PROCESSORS Speaker: Athanasios Stratikopoulos, The University of Manchester, GB Authors: Christos Kotselidis¹, Ioannis Komnios², Orestis Akrivopoulos³, Sebastian Bress⁴, Katerina Doka⁵, Hazeef Mohammed⁶, Georgios Mylonas⁷, Vassilis Spitadakis⁸, Daniel Strimpel⁹, Juan Fumero¹, Foivos S. Zakkak¹, Michail Papadimitriou¹, Maria Xekalaki¹, Nikos Foutris¹, Athanasios Stratikopoulos¹, Nectarios Koziris⁵, Ioannis Konstantinou⁵, Ioannis Mytilinis⁵, Constantinos Bitsakos⁵, Christos Tsalidis⁸, Christos Tselios³, Nikolaos Kanakis³, Clemens Lutz⁴, Viktor Rosenfeld⁴ and Volker Markl⁴ ¹The University of Manchester, GB; ²Exus Ltd., US; ³Spark Works ITC Ltd., GB; ⁴German Research Center for Artificial Intelligence, DE; ⁵National TU Athens, GR; ⁶Kaleao Ltd., GB; ⁷Computer Technology Institute & Press Diophantus, GR; ⁸Neurocom Luxembourg, LU; ⁹IProov Ltd., GB Abstract This paper addresses the fundamental question of how modern Big Data frameworks can dynamically and transparently exploit heterogeneous hardware accelerators. After presenting the major challenges that have to be addressed towards this goal, we describe our proposed architecture for automatic and transparent hardware acceleration of Big Data frameworks and applications. Our vision is to retain the uniform programming model of Big Data frameworks and enable automatic, dynamic Just-In-Time compilation of the candidate code segments that benefit from hardware acceleration to the corresponding format. In conjunction with machine learning-based device selection, that respect user-defined constraints (e.g., cost, time, etc.), we enable dynamic code execution on GPUs and FPGAs transparently to the user. In addition, we dynamically re-steer execution at runtime based on the availability of resources. Our preliminary results demonstrate that our approach can accelerate an existing Apache Flink application by up to 16.5x. Download Paper (PDF; Only available from the DATE venue WiFi)
16:00		End of session

Time

Label

Presentation Title
Authors

14:30

3.3.1

ESA ATHENA WFI ONBOARD ELECTRONICS - DISTRIBUTED CONTROL AND DATA PROCESSING (WORK IN PROGRESS IN THE PROJECT)
Speaker:
Markus Plattner, Max Planck Institute for extraterrestrial Physics, DE
Authors:
Markus Plattner¹, Sabine Ott¹, Jintin Tran¹, Christopher Mandla¹, Manfred Steller², Harald Jeszensky², Roland Ottensamer³, Jan-Christoph Tenzer⁴, Thomas Schanz⁴, Samuel Pliego⁴, Konrad Skup⁵, Denis Tcherniak⁶, Chris Thomas⁷, Julian Thornhill⁷ and Sebastian Albrecht¹
¹Max Planck Institute for extraterrestrial Physics, DE; ²IWF - Space Research Institute, AT; ³TU Wien, AT; ⁴University of Tübingen, DE; ⁵CBK Warsaw, PL; ⁶Technical University of Denmark, DK; ⁷University of Leicester, GB
Abstract
Within this paper, we describe the control electronics and data processing architecture and functionality of the Wide Field Imager (WFI). WFI is one of two scientific instruments of the next European X-ray observatory ATHENA whose development started five years ago. Meanwhile, a conceptual design, development models and a number of technology development activities have been performed.
Download Paper (PDF; Only available from the DATE venue WiFi)

15:00

3.3.2

LEGATO: LOW-ENERGY, SECURE, AND RESILIENTTOOLSET FOR HETEROGENEOUS COMPUTING
Speaker:
Valerio Schiavoni, University of Neuchâtel, CH
Authors:
Behzad Salami¹, Konstantinos Parasyris¹, Adrian Cristal¹, Osman Unsal¹, Xavier Martorell¹, Paul Carpenter¹, Raul De La Cruz¹, Leonardo Bautista¹, Daniel Jimenez¹, Carlos Alvarez¹, Saber Nabavi¹, Sergi Madonar¹, Miquel Pericàs², Pedro Trancoso², Mustafa Abduljabbar², Jing Chen², Pirah Noor Soomro², Madhavan Manivannan², Micha von dem Berge³, Stefan Krupop³, Frank Klawonn⁴, Amani Mihklafi⁴, Sigrun May⁴, Tobias Becker⁵, Georgi Gaydadjiev⁵, Hans Salomonsson⁶, Devdatt Dubhashi⁶, Oron Port⁷, Yoav Etsion⁸, Le Quoc Do⁹, Christof Fetzer⁹, Martin Kaiser¹⁰, Nils Kucza¹⁰, Jens Hagemeyer¹⁰, René Griessl¹⁰, Lennart Tigges¹⁰, Kevin Mika¹⁰, Arne Hüffmeier¹⁰, Marcelo Pasin¹¹, Valerio Schiavoni¹¹, Isabelly Rocha¹¹, Christian Göttel¹¹ and Pascal Felber¹¹
¹BSC, ES; ²Chalmers, SE; ³Christmann Informationstechnik + Medien GmbH & Co. KG, DE; ⁴Helmholtz-Zentrum für Infektionsforschung GmbH, DE; ⁵MAXELER, GB; ⁶MIS, SE; ⁷TECHNION, IL; ⁸Technion, IL; ⁹TU Dresden, DE; ¹⁰UNIBI, DE; ¹¹UNINE, CH
Abstract
The LEGaTO project leverages task-based programming models to provide a software ecosystem for Made-in-Europe heterogeneous hardware composed of CPUs, GPUs, FPGAs and dataflow engines. The aim is to attain one order of magnitude energy savings from the edge to the converged cloud/HPC, balanced with the security and resilience challenges. LEGaTO is an ongoing three-year EU H2020 project started in December 2017.
Download Paper (PDF; Only available from the DATE venue WiFi)

15:30

3.3.3

EFFICIENT COMPILATION AND EXECUTION OF JVM-BASED DATA PROCESSING FRAMEWORKS ON HETEROGENEOUS CO-PROCESSORS
Speaker:
Athanasios Stratikopoulos, The University of Manchester, GB
Authors:
Christos Kotselidis¹, Ioannis Komnios², Orestis Akrivopoulos³, Sebastian Bress⁴, Katerina Doka⁵, Hazeef Mohammed⁶, Georgios Mylonas⁷, Vassilis Spitadakis⁸, Daniel Strimpel⁹, Juan Fumero¹, Foivos S. Zakkak¹, Michail Papadimitriou¹, Maria Xekalaki¹, Nikos Foutris¹, Athanasios Stratikopoulos¹, Nectarios Koziris⁵, Ioannis Konstantinou⁵, Ioannis Mytilinis⁵, Constantinos Bitsakos⁵, Christos Tsalidis⁸, Christos Tselios³, Nikolaos Kanakis³, Clemens Lutz⁴, Viktor Rosenfeld⁴ and Volker Markl⁴
¹The University of Manchester, GB; ²Exus Ltd., US; ³Spark Works ITC Ltd., GB; ⁴German Research Center for Artificial Intelligence, DE; ⁵National TU Athens, GR; ⁶Kaleao Ltd., GB; ⁷Computer Technology Institute & Press Diophantus, GR; ⁸Neurocom Luxembourg, LU; ⁹IProov Ltd., GB
Abstract
This paper addresses the fundamental question of how modern Big Data frameworks can dynamically and transparently exploit heterogeneous hardware accelerators. After presenting the major challenges that have to be addressed towards this goal, we describe our proposed architecture for automatic and transparent hardware acceleration of Big Data frameworks and applications. Our vision is to retain the uniform programming model of Big Data frameworks and enable automatic, dynamic Just-In-Time compilation of the candidate code segments that benefit from hardware acceleration to the corresponding format. In conjunction with machine learning-based device selection, that respect user-defined constraints (e.g., cost, time, etc.), we enable dynamic code execution on GPUs and FPGAs transparently to the user. In addition, we dynamically re-steer execution at runtime based on the availability of resources. Our preliminary results demonstrate that our approach can accelerate an existing Apache Flink application by up to 16.5x.
Download Paper (PDF; Only available from the DATE venue WiFi)

16:00

End of session