Organiser:
John Zhao, MathWorks, US

In this session, you will learn, through a combination of lecture and examples, how to quickly construct your algorithm in MATLAB and Simulink using the floating-point data type, generate synthesizable and optimized RTL code and implement it on a FPGA by clicking a few buttons. You will also learn how to further optimize your algorithm and achieve desired performance by quantizing your algorithm to fixed-point data type, and applying pipelining and resource sharing features.

Organiser:
John Zhao, MathWorks, US

In this session, you will learn how to easily implement a complex algorithm or system that involves both FPGA and multi-core embedded processor using the Model Based Design approach. The design workflow leverages the C code and HDL code generation technology, as well as interface and project generation, targeting the MPSoC devices such as Xilinx Zynq family.

Organiser:
Stefano Olivieri, MathWorks Academia Group, US

In this session you will learn how you can increase the efficiency of your FPGA and ASIC verification process by connecting MATLAB and Simulink algorithms, components, environment model with FPGA development platform using FPGA-In-The-Loop capability.