Time | Label | Session |
---|---|---|
08:30 | W02.1 | Greeting Session Organisers: |
08:35 | W02.2 | Session 1 |
08:35 | W02.2.1 | Invited Talk: Where Are My Requirements? A Forgotten Piece of the Trustworthy Design Puzzle Sandip Ray, Intel Corporation, US The life of a computing system arguably begins with architects developing architectural models, and tuning various design parameters for target performance and power consumption. The result of this process is the definition of the high-level architectural specification of the system, which defines the functional requirements for the system design. This specification is used as a guide for most downstream activities, e.g., decompose system functionality, implement various design blocks, perform code reviews, design pre-silicon and post-silicon validation test-benches, define assertions, etc. Unfortunately, architectural specifications are rarely developed with the rigor, discipline, and formality warranted for something used so extensively throughout the system life cycle. System functionality is typically described informally with prose mixed with charts, diagrams, and tables. Furthermore, these descriptions are spread across a large number of different documents, each document several hundreds of pages long and covering different aspects of the design (e.g., functionality, power, security, communication, etc.). Unsurprisingly, these documents contain inconsistencies, ambiguities, even errors. These are often discovered late in the implementation or validation phases or on field, leading to late design churns, complex patches, point-fixes, and de-featuring. The situation is exacerbated in recent years with fast increasing design complexity on the one hand and decreasing time-to-market on the other. |
09:35 | W02.2.2 | Verification and debugging of scientific computations with hardware through extraction of arithmetic assertions Masahiro Fujita, University of Tokyo, JP |
10:00 | W02.3 | Coffee Break |
10:20 | W02.4 | Session 2 |
10:20 | W02.4.1 | The Subset Permutation-Independent Conditional Equivalence Checking Problem Mathias Soeken1, Baruch Sterin2 and Robert Brayton2 1Universität Bremen, DE; 2University of California Berkeley, US |
10:45 | W02.4.2 | Transparent Logic in Hardware Designs Yu-Yun Dai and Robert Brayton, University of California Berkeley, US |
11:10 | W02.4.3 | Signature-Based Sub-Circuit Extraction Amir Masoud Gharehbaghi1 and Masahiro Fujita2 1The University of Tokyo, JP; 2University of Tokyo, JP |
11:35 | W02.4.4 | Matching Abstract and Concrete Hardware Models for Design Understanding Tino Flenker, University of Bremen, DE |
12:00 | W02.5 | Lunch Break |
13:20 | W02.6 | Session 3 |
13:20 | W02.6.1 | Invited Talk: What can Algebraic Geometry tell us about the Function implemented by a Circuit? Priyank Kalla, University of Utah, US Algebraic Geometry is the study of the (geometry of) solutions to a system of polynomial equations. Modern algebraic geometry does not explicitly solve the system of equations to enumerate the solutions, but rather reasons about the solutions using abstract/computational algebra. Particularly, the theory and technology of Groebner bases provide a powerful set of tools to solve these polynomial decision problems. In this talk, I will describe how techniques from algebraic geometry and symbolic computation can be used to derive canonical (word-level) abstractions of the functions implemented by hardware designs. Hardware designs and their functions often exhibit some structure or symmetry in the implementations. To improve our understanding of hardware designs, the functionality, symmetry and the structure of the circuits needs to be analyzed together. Can algebraic geometry help us achieve that? I will present Groebner bases techniques and applications that show glimpses of such a capability --- hopefully, this will motivate the DUHDe community to investigate the use of algebraic geometry to better understand hardware designs. Bio: Priyank Kalla received the B.E. degree in electronics engineering from Birla Vishvakarma Mahavidyalaya, Sardar Patel University, Vallabh Vidyanagar, India, in 1993, and the M.S. and Ph.D. degrees from the University of Massachusetts, Amherst, in 1998 and 2002. Since 2002, he has been first an Assistant Professor and now an Associate Professor with the Electrical and Computer Engineering Department at the University of Utah in Salt Lake City. Dr. Kalla's research interests are in fundamental CAD techniques for the synthesis, optimization, and verification of digital VLSI circuits and systems. Dr. Kalla was a recipient of the NSF CAREER award in 2006. |
14:20 | W02.6.2 | Change Management for Hardware Designers Martin Ring1, Jannis Stoppe2, Christoph Luth3 and Rolf Drechsler4 1Deutsches Forschungszentrum fur Kunstliche Intelligenz, Bremen, Germany, DE; 2Universität Bremen, DE; 3University of Bremen, Germany, DE; 4Department of Mathematics and Computer Science, University of Bremen, GermanyCyber-Physical Systems, DFKI GmbH, Bremen, Germany, DE |
14:45 | W02.7 | Coffee Break |
15:05 | W02.8 | Session 4 |
15:05 | W02.8.1 | Opportunities for Analyzing Hardware Specifications with NLP Techniques Alejandro Rago, Claudia Marcos and Andrés Diaz-Pace, Instituto Superior de Ingeniería de Software (ISISTAN-UNICEN) Tandil, Buenos Aires, Argentina, AR |
15:30 | W02.8.2 | SycView: Visualize and Profile SystemC Simulations Denis Becker1, Matthieu Moy2 and Jerome Cornet1 1ST Microelectronics F-38019 Grenoble, France, FR; 2Verimag, Grenoble, FR |
15:55 | W02.8.3 | Visualizing Microfluidic Biochips Interactively Oliver Keszöcze1, Robert Wille1 and Rolf Drechsler2 1University of Bremen, DE; 2Department of Mathematics and Computer Science, University of Bremen, GermanyCyber-Physical Systems, DFKI GmbH, Bremen, Germany, DE |