FM01 Welcome Reception & PhD Forum, hosted by EDAA, ACM SIGDA, and IEEE CEDA

Agenda

Time	Label	Session
18:00	FM01.1	Poster Session
18:00	FM01.1.38	A Method for Power Abstraction and Simulation of Hardware Components at System Level Daniel Lorenz, OFFIS, DE
18:00	FM01.1.39	Auto-tuning Techniques for Compiler Optimization Amir Hossein Ashouri, Politecnico Di Milano, IT
18:00	FM01.1.40	System-Level Design of Embedded Systems for Reliability Hananeh Aliee, Friedrich-Alexander-Universität Erlangen-Nürnberg, DE
18:00	FM01.1.41	Analyzing Systems for Correct Implementation of Robustness Niels Thole, University of Bremen, DE
18:00	FM01.1.42	Novel EDA techniques for Printed Electronics Circuits Manuel Llamas, UAB, ES
18:00	FM01.1.43	Proactive Power and Thermal Aware Optimizations for Energy-Efficient Cloud Computing Patricia Arroba, Universidad Politecnica de Madrid, ES
18:00	FM01.1.44	Research on VLSI architecture for Intra prediction in H.265 for 8K UHDTV video decoder Jianbin Zhou, Waseda University, JP
18:00	FM01.1.47	Enabling Caches in Probabilistic Timing Analysis Leonidas Kosmidis, Barcelona Supercomputing Center and Universitat Politècnica de Catalunya, ES
18:00	FM01.1.48	Resilient Design for Three-Dimensional Integrated Circuits Shengcheng Wang, Karlsruhe Institute of Technology, DE
18:00	FM01.1.49	Low-Power High-Performance High-Reliable Spintronic Design Rajendra Bishnoi, Karlsruhe Institute of Technology, DE
18:00	FM01.1.50	Automatic Reconfigurable Platforms Design Carlo Sau, University of Cagliari, IT
18:00	FM01.1.51	Robust Image Processing Hardware Acceleration on Reconfigurable Devices for Critical Applications Pascal Trotta, Politecnico di Torino, IT
18:00	FM01.1.52	Novel Reliability Estimation Techniques for Nano-scale Circuits Affected by Noise, Process Variations and Aging Usman Khalid, Sapienza University of Rome, IT
18:00	FM01.1.53	Analysis, Design, and Optimization of Embedded Control Systems Amir Aminifar, Linköping University, SE
18:00	FM01.1.54	Hardware-enhanced run-time Management for Many-Core Processors Daniel Gregorek, University of Bremen, DE
18:00	FM01.1.55	Design and Formal Analysis of Run-DMC, A Dynamically-Scheduled Real-Time Memory Controller Yonghui Li, Eindhoven University of Technology, NL
18:00	FM01.1.56	Exploiting Body Biasing in Dynamically Reconfigurable Processors Johannes Maximilian Kühn, Keio University/Eberhard Karls Universität Tübingen, JP
18:00	FM01.1.57	Optimization and Complexity Analysis of Quantum Circuits Abdessaied Nabila, University of Bremen, DE
18:00	FM01.1.58	Generating Optimal Functional Coverages in Digital Systems Alfonso Martinez, Computer Research Center (CIC-IPN), MX
18:00	FM01.1.59	Holistic Actor-Oriented Modeling of Embedded Systems for ESL Power Consumption Evaluation Rafael Rosales, Friedrich-Alexander-Universität Erlangen-Nürnberg, DE
18:00	FM01.1.60	Uncertainty Quantification of Integrated Circuits and Microelectromechanical Systems Zheng Zhang, MIT and Argonne National Labs, US
18:00	FM01.1.61	A Homogeneous Platform-Based Design Approach for the Design of Heterogeneous Systems Michele Lora, University of Verona, IT
18:00	FM01.1.62	Modeling and Mitigation of Parametric Time-Dependent Variability in Digital Systems Dimitrios Rodopoulos, ICCS/NTUA, GR
18:00	FM01.1.63	Highly Automated Formal Verification of Arithmetic Circuits Amr Sayed Ahmed, Institute of Computer Science, University of Bremen, 28359 Bremen, Germany, DE
18:00	FM01.1.64	A PLATFORM FOR HIGH-PERFORMANCE AND POWER-AWARE NETWORK PROCESSING ON GPUS Federico Busato, University of Verona, IT
18:00	FM01.1.65	FPGA Mapping Considering Aging and Process Variation Mohammad Ebrahimi, University of Tehran, IR
18:00	FM01.1.66	Circuit-Level Optimizations for Cryptography Vladimir Rozic, ESAT/COSIC and iMinds, KU Leuven, BE
18:00	FM01.1.67	Design and Scheduling of Real-Time Embedded Systems Zaid Al-bayati, McGill University, CA

Submissions

FM01 Welcome Reception & PhD Forum, hosted by EDAA, ACM SIGDA, and IEEE CEDA

Agenda

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