Tackling the Bottleneck of Delay Tables in 3D Ultrasound Imaging
A. Ibrahim1,a, P. Hager2,d, A. Bartolini2,e, F. Angiolini1,b, M. Arditi3, L. Benini2,f and G. De Micheli1,c
1LSI, EPFL, Switzerland.
2IIS, ETHZ, Switzerland.
3D ultrasound imaging is quickly becoming a reference
technique for high-quality, accurate, expressive diagnostic
medical imaging. Unfortunately, its computation requirements
are huge and, today, demand expensive, power-hungry, bulky
processing resources. A key bottleneck is the receive beamforming
operation, which requires the application of many permutations
of fine-grained delays among the digitized received echoes. To
apply these delays in the digital domain, in principle large tables
(billions of coefficients) are needed, and the access bandwidth to
these tables can reach multiple TB/s, meaning that their storage
both on-chip and off-chip is impractical. However, smarter
implementations of the delay generation function, including
forgoing the tables altogether, are possible. In this paper we
explore efficient strategies to compute the delay function that
controls the reconstruction of the image, and present a feasibility
analysis for an FPGA platform.
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