A High Efficiency Hardware Trojan Detection Technique Based on Fast SEM Imaging
Franck Courbon1,2, Philippe Loubet-Moundi1, Jacques J.A. Fournier3 and Assia Tria3
1GEMALTO, Security Labs, La Ciotat, France
2Ecole des Mines de Saint-Etienne, CMP-GC/LSAS, Gardanne, France
3CEA, CEA Tech Region, DPACA/LSAS, Gardanne, France
In the semiconductor market where more and more companies become fabless, malicious integrated circuits' modifications are seen as possible threats. Those Hardware Trojans can have various effects and can be implemented by different entities with different means. This article includes the integration of an almost automatic Hardware Trojan detection. The latter is based on a visual inspection implemented within the integrated circuit life cycle. The proposed detection methodology is quite efficient regarding tools, user experience and time needed. A single layer of the chip is accessed and then imaged with a Scanning Electron Microscope (SEM). The acquisition of several hundred images at high magnification is automated as does the images registration. Then depending on the reference availability, one can check if any supplementary gates have been inserted in the design using a golden reference or a graphic/text design file. Depending on the reference, either basic image processing is used to compare the chip extracted image with a golden model or some pattern recognition can be used to retrieve the number of occurrences of each standard cell. The depicted methodology aims to detect any gate modification, substitution, removal or addition and so far require an invasive approach and a reference.
Full Text (PDF)