Towards Systematic Design of 3D pNML Layouts
Robert Perricone1,a, Yining Zhu2, Katherine M. Sanders1,b, X. Sharon Hu1,c and Michael Niemier1,d
1Department of Computer Science and Engineering, University of Notre Dame Notre Dame, IN, USA.
2Department of Information Science and Communication Engineering, Zhejiang University Hangzhou, Zhejiang Province, China.
Nanomagnetic logic (NML) is a “beyond-CMOS” technology that uses bistable magnets to store, process, and move binary information. Compared to CMOS, NML has several advantages such as non-volatility, lower power consumption, and radiation hardness. Recently, NML devices with perpendicular magnetic anisotropy (pNML) have been experimentally demonstrated to perform logic operations in three dimensions. 3D pNML layouts provide additional benefits such as simplified signal routing and greater integration density. However, designing functional 3D pNML circuits can be challenging as one must consider the effects of fringing magnetic fields in three dimensions. Furthermore, the current process of designing 3D pNML layouts is little more than a trial-and-error-based approach, which is infeasible for larger, more complex designs. In this paper, we propose a systematic approach to designing 3D pNML layouts. Our design process leverages a machine learning-inspired prediction approach that examines the effects of varying individual device parameters (e.g., length, width, etc.) and predicts functional configurations.
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