Thermal Aware Design Method for VCSEL-Based On-Chip Optical Interconnect
Hui Li1, Alain Fourmigue2, Sébastien Le Beux1,a, Xavier Letartre1, Ian O’Connor1 and Gabriela Nicolescu2
1Lyon Institute of Nanotechnology, INL-UMR5270, Ecole Centrale de Lyon, Ecully, F-69134, France.
2Computer and Software Engineering Dept., Ecole Polytechnique de Montréal, Montréal (QC), Canada
Optical Network-on-Chip (ONoC) is an emerging technology considered as one of the key solutions for future generation on-chip interconnects. However, silicon photonic devices in ONoC are highly sensitive to temperature variation, which leads to a lower efficiency of Vertical-Cavity Surface- Emitting Lasers (VCSELs), a resonant wavelength shift of Microring Resonators (MR), and results in a lower Signal to Noise Ratio (SNR). In this paper, we propose a methodology enabling thermal-aware design for optical interconnects relying on CMOS-compatible VCSEL. Thermal simulations allow designing ONoC interfaces with low gradient temperature and analytical models allow evaluating the SNR.
Keywords: ONoC, Design methodology, Thermal simulation.
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