Embedded HW/SW Platform for On-the-Fly Testing of True Random Number Generators
Bohan Yang1,a, Vladimir Rožić1,b, Nele Mentens1,c, Wim Dehaene2 and Ingrid Verbauwhede1,d
1ESAT/COSIC and iMinds, KU Leuven, Kasteelpark Arenberg 10, B-3001 Leuven-Heverlee, Belgium.
2ESAT/MICAS, KU Leuven and IMEC, Kasteelpark Arenberg 10, B-3001 Leuven-Heverlee, Belgium.
We present a HW/SW platform for on-the-fly detection of failures and weaknesses in entropy sources. By splitting the operations between hardware and software, we achieve sufficient flexibility to control the level of significance of the tests. This approach also enables sharing resources between different tests thereby reducing the area and power. Statistical tests were selected from the NIST test suite. We propose several versions of hardware co-processors for monitoring random bit sequences, ranging from 52 slices (5 tests) to 552 slices (9 tests) on Spartan-6 FPGA. We are the first to provide implementations of the Serial test and the Approximate entropy test for on-the-fly monitoring.
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