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doi: 10.7873/DATE.2015.0208
High-Resolution Online Power Monitoring for Modern Microprocessors
Fabian Oborila, Jos Ewertb and Mehdi B. Tahooric
Chair of Dependable Nano Computing (CDNC), Karlsruhe Institute of Technology (KIT), Karlsruhe, Germany.
afabian.oboril@kit.edu
bmehdi.tahoori@kit.edu
cjos.ewert@student.kit.edu
ABSTRACT
The power consumption of computing systems is nowadays a major design constraint that affects performance and reliability. To cooptimize these aspects, fine-grained adaptation techniques at runtime are of growing importance. However, to use these tools efficiently, fine-grained information about the power consumption of various on-chip components at runtime is required. Therefore, here we propose a novel softwareimplemented high-resolution (spatial and temporal) power monitoring approach that relies on micro-models to estimate the power consumption of all microarchitectural components inside a processor core. Combined with a self-calibration technique that uses an available on-chip power sensor, our power estimation approach can achieve an accuracy of more than 99% and provides deep insights about the power dissipation inside a processor core during workload execution.
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