Feedback-Bus Oscillation Ring: A General Architecture for Delay Characterization and Test of Interconnects
Shi-Yu Huang1, Meng-Ting Tsai1, Kun-Han (Hans) Tsai2 and Wu-Tung Cheng2
1Electrical Engineering Department, National Tsing Hua University, Taiwan
2Silicon Test Solutions, Mentor Graphics , USA
In this paper we propose a flexible delay characterization and test architecture, called Feedback-Bus Oscillation Ring (FB-OR), for die-to-die interconnects in a 3D IC. As compared to previous works, it is unique in its ability to streamline the characterization/test operations for a set of arbitrary interconnects with multiple pins sprawling multiple dies. During the Design-for-Testability stage, one common feedback-bus (connected to all dies in the IC under characterization/test) is inserted. Through this feedback-bus, an oscillation ring can be formed dynamically and the Variable-Output-Threshold (VOT) technique can be applied to characterize the delay of one interconnect segment at a time. Experimental results indicate that this method is not only flexible and scalable, but requiring only a small area overhead.
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