Date: Wednesday 16 March 2016
Time: 17:00 - 18:30
Location / Room: Konferenz 4
Chair:
Dominique Borrione, Laboratoire TIMA, FR
Co-Chair:
Marc Geilen, Eindhoven University of Technology, NL
The first two papers present advances in modeling parallelism and dynamism in dataflow applications. The third paper presents a novel method to extract verification properties from a natural language specification.
| Time | Label | Presentation Title Authors |
|---|---|---|
| 17:00 | 8.6.1 | EXPLOITING RESOURCE-CONSTRAINED PARALLELISM IN HARD REAL-TIME STREAMING APPLICATIONS Speaker: Jelena Spasic, Leiden University, NL Authors: Jelena Spasic, Di Liu and Todor Stefanov, Leiden University, NL Abstract In this paper, we study the problem of exploiting parallelism when a hard real-time streaming application modeled as a Synchronous Data Flow (SDF) graph is mapped onto a Multi-Processor System-on-Chip (MPSoC) platform. We propose a new unfolding graph transformation and an algorithm that adapts the parallelism in the application according to the resources in an MPSoC by using the unfolding transformation. We evaluate the efficiency of our unfolding graph transformation and the performance and time complexity of our algorithm in comparison to the existing approaches. Experiments on a set of real-life streaming applications demonstrate that: 1) our unfolding transformation gives shorter latency and smaller buffer sizes when compared to the related approaches; and 2) our algorithm finds a solution with smaller code size, smaller buffer sizes and shorter latency in 98\% of the experiments, while meeting the same performance and timing requirements when compared to an existing approach. Download Paper (PDF; Only available from the DATE venue WiFi) |
| 17:30 | 8.6.2 | TRANSACTION PARAMETERIZED DATAFLOW: A MODEL FOR CONTEXT-DEPENDENT STREAMING APPLICATIONS Speaker: Xuan Khanh Do, CEA LIST, FR Authors: Xuan Khanh Do1, Stéphane Louise1 and Albert Cohen2 1CEA LIST, FR; 2Inria, FR Abstract Static dataflow programming models are well suited to the development of embedded many-core systems. However, complex signal and media processing applications often display dynamic behavior that do not fit the classical static restrictions. We propose Transaction Parameterized Dataflow (TPDF), a new model of computation combining integer parameters—to express dynamic rates—and a new type of control actor—to allow topology changes and time constraints enforcement. We present static analyses for liveness and bounded memory usage. We also introduce a static scheduling heuristic to map TPDF to massively parallel embedded platforms. We validate the model and associated methods using a cognitive radio application, demonstrating significant buffer size and performance improvements compared to state of the art models including Cyclo-Static Dataflow (CSDF). Download Paper (PDF; Only available from the DATE venue WiFi) |
| 18:00 | 8.6.3 | GLAST: LEARNING FORMAL GRAMMARS TO TRANSLATE NATURAL LANGUAGE SPECIFICATIONS INTO HARDWARE ASSERTIONS Speaker: Christopher Harris, University of California, Irvine, US Authors: Christopher Harris and Ian Harris, University of California, Irvine, US Abstract The purpose of functional verification is to ensure that a design conforms to its specification. However, large written specifications can contain hundreds of statements describing correct operation which an engineer must use to create sets of correctness properties. This laborious manual process increases both verification time and cost. In this work we present GLAsT, a new learning algorithm which accepts a small set of sentences describing correctness properties and corresponding SystemVerilog Assertions (SVAs). GLAsT creates a custom formal grammar which captures the writing style and sentence structure of a specification and facilitates the automatic translation of English specification sentences into formal SystemVerilog Assertions. We evaluate GLAsT on English sentences from two ARM AMBA bus protocols. Results show that a translation system using the formal grammar generated by GLAsT automatically generates correctly formed SVAs from the targeted AMBA specification as well as from a second, different AMBA bus specification. Download Paper (PDF; Only available from the DATE venue WiFi) |
| 18:30 | IP4-3, 292 | HANDLING COMPLEX DEPENDENCIES IN SYSTEM DESIGN Speaker: Mischa Möstl, Technische Universität Braunschweig, DE Authors: Mischa Möstl and Rolf Ernst, Technische Universität Braunschweig, DE Abstract In this paper we describe a novel strategy to reveal and handle complex dependencies in an incremental and distributed design processes even under the ubiquitous presence of uncertainties concerning model and design. We demonstrate in a case study how to handle epistemic design uncertainty in an iterative process and present how it is possible to selectively exclude dependency paths under certain concerns such as timing by including third party analysis results based on the used models into the dependency analysis. Since the implementation of our approach relies on modern graph analysis libraries it can scale to realistic problem instances. Download Paper (PDF; Only available from the DATE venue WiFi) |
| 18:30 | End of session | |