Keynote Address
2.2: System-Level Techniques to Handle Performance, Reliability and Thermal Issues
2.3: Modeling and Simulation of Interconnects
2.4: PANEL AND EMBEDDED TUTORIAL SESSION - Logic Synthesis and Place and Route: After 20 Years of Engagement, Wedding in View?
2.5: Transient Faults and Soft Errors
2.6: Networked Embedded Systems
2.7: Design of Energy-Efficient and Automotive Systems
2.8: EMBEDDED TUTORIAL - Addressing Critical Power Management Verification Issues in Low Power Designs
3.2: Power Optimization of Multi-Core Architectures
3.3: Core Algorithms for Formal Verification Engines
3.4: Predicting Bugs and Generating Tests for Validation
3.5: Timing Related Issues in Test
3.6: Performance and Timing Analysis
3.7: Implementations for Digital Baseband Processing
3.8: PANEL SESSION - Power Formats: Beyond UPF and CPF
IP1: Interactive Presentations
4.2: Robust and Low Power Systems
4.3: Formal Verification Techniques and Applications
4.4: System Level Simulation and Validation
4.5: Advances in Analogue, Mixed Signal and RF Testing
4.6: Design Automation Methodologies and Architectures for Three-Dimensional ICs
4.7: Resource Management for QoS Guaranteed NoCs
5.1: SMART DEVICES EMBEDDED TUTORIAL - Smart Devices for the Cloud Era
5.2: An Encyclopedia of Routing
5.3: Temperature and Variation Aware Design in Low Power Systems
5.4: Advanced NoC Tooling and Architectures
5.6: Analysis, Compilation and Runtime Techniques
5.7: EMBEDDED TUTORIAL - Architectures for Online Error Detection and Recovery in Multicore Processors
IP2: Interactive Presentations
6.2: Placement and Floorplanning
6.3: Power Modeling, Analysis and Optimization
6.4: Design and Test of Fault Resilient NoC Architectures
6.5: New Techniques for Diagnosis and Debug
6.6: Embedded Software for Parallel Architectures
6.7: HOT TOPIC - Virtual Manycore Platforms: Moving Towards 100+ Processor Cores
6.8: PANEL SESSION - Embedded Software Debug and Test
7.1: SMART DEVICES HOT TOPIC - Smart Medical Implants
7.2: Emerging Memory Technologies
7.3: Architectural Optimization for Low Power Systems
7.4: Advanced Technologies for NoC Implementation
7.5: Emerging Test Solutions for Advanced Technologies, RF and MEMS Devices
7.6: Innovative Power-Aware Systems for a Green and Healthy Society
7.7: HOT TOPIC - Foundations of Component-Based Design for Embedded Systems
7.8: EMBEDDED TUTORIAL - Predictable System Integration
IP3: Interactive Presentations
8.1: SMART DEVICES PANEL SESSION - Integrating the Real World Interfaces
8.2: System-Level Design Techniques for Automotive Systems
8.3: Power/Error Tradeoffs
8.4: Memory System Architectures
8.5: Testing and Designing SRAM Memories
8.6: Cryptoanalysis, Attacks and Countermeasures
8.7: HOT TOPIC - Flows, Application and Future of Component-based Design for Embedded Systems
8.8: EMBEDDED TUTORIAL - Communication Networks in Next Generation Automobiles
9.1: INTELLIGENT ENERGY MANAGEMENT TUTORIAL - Energy Transfer, Generation and Power Electronics
9.2: Design Automation Methodologies for Emerging Technologies
9.3: System Modeling
9.4: Modeling and Verification of Analogue and RF Circuits
9.6: Embedded System Resource Allocation and Management
9.7: EMBEDDED TUTORIAL - Sub-Wave Length Lithography and Variability Aware Test and Characterization Methods
IP4: Interactive Presentations
10.1.1: INTELLIGENT ENERGY MANAGEMENT - Smart Energy Generation: Design Automation and the Smart-Grid
10.2: Advanced Algorithms and Applications for Reconfigurable Computing
10.3: System Optimizations and Adaptivity
10.4: Design and Simulation of Mixed-Signal Systems
10.5: Advances in Test Generation and Fault Simulation
10.6: Model Based Verification and Synthesis of Embedded Systems
10.7: EMBEDDED TUTORIAL - Die Stacking Goes Mobile and Embedded
10.8: PANEL SESSION - State of the Art Verification Methodologies in 2015
11.1: INTELLIGENT ENERGY MANAGEMENT - Smart Energy Utilization: From Circuits to Consumer Products
11.2: Architectural Innovations for Reconfigurable Computing
11.3: Asynchronous Circuits and Advanced Timing Issues in Logic Synthesis
11.4: High Level Synthesis
11.5: New Directions in Testing
11.6: Hardware Design for Multimedia Applications
11.7: HOT TOPIC - New Frontiers in Embedded Systems Design: Technology and Applications
11.8: HOT TOPIC - Stochastic Circuit Reliability Analysis in Nanometer CMOS
IP5: Interactive Presentations
12.1: INTELLIGENT ENERGY MANAGEMENT PANEL SESSION - The Role of the EDA Community in the Future of World Energy Supply and Conservation?
12.2: Design and Run-Time Support for Dynamic Reconfigurability
12.3: Reliability and Error Tolerance in Logic Synthesis
12.4: Multilevel Simulation and Validation
12.5: Error Correction and Resilience
12.6: Security Modules from Layout to Network-on-Chip
12.7: HOT TOPIC - Sustainability through Massively Integrated Computing: Are We Ready to Break the Energy Efficiency Wall for Single-Chip Platforms?
12.8: HOT TOPIC - Synthesis Supported Increase of Efficiency in Analog Design