DATE 2007 SESSION INDEX

Keynote Addresses
1.2: Design Records
Interactive Presentation
1.3: Design for Testability for SoCs
1.4: Communication Synthesis under Timing Constraints
1.5: Performance Modelling and Synthesis of Analogue/Mixed-Signal Circuits
Interactive Presentation
1.6: System Level Mapping and Simulation
Interactive Presentation
1.7: Algorithms and Applications of Run-Time Reconfiguration
Interactive Presentations
2.2: IP Designs for Media Processing and Other Computational Intensive Kernels
Interactive Presentations
2.3: Test Infrastructure of SoCs and its Verification
Interactive Presentations
2.4: HOT TOPIC - Microprocessors in the Era of Terascale Integration
2.5: Statistical / Nonlinear Analysis and Verification for Analogue Circuits
Interactive Presentation
2.6: System Modeling and Specification
Interactive Presentations
2.7: Design Space Exploration and Nano-Technologies for Reconfigurable Computing
Interactive Presentation
3.2: Implementation of LDPC Codecs for Various Communication Standards
Interactive Presentation
3.3: Testing NoCs
3.4: Synthesis at System and Architectural Levels
Interactive Presentations
3.5: Analogue and Mixed-Signal Design and Characterization
3.6: PANEL SESSION - Should You Trust the Surgeon or the Family Doctor?
3.7: Automatic Synthesis of Computation Intensive Application Specific Circuits
Interactive Presentation
4.1: EMBEDDED TUTORIAL - Design, Verification and Test (Ubiquitous Communication and Computation Special Day)
4.2: Automotive
Interactive Presentation
4.3: Test Generation for Diagnosis, Scan Testing and Advanced Memory Fault Models
Interactive Presentations
4.4: Future Design Challenges
Interactive Presentations
4.5: Application-Specific Architectures
Interactive Presentations
4.6: Technology and Process Aware Low Power Circuit Design
Interactive Presentation
4.7: Hardware Implementation of MPSoCs and NoCs Architectures
Interactive Presentation
5.1.1: Security and Trust in Ubiquitous Communication (Ubiquitous Communication and Computation Special Day)
5.1.2: Lunch-Time Keynote and Awards
5.2: Best Industrial System Designs in Aerospace, Avionics and Automotive
5.3: Mixed-Signal and RF Test
Interactive Presentation
5.4: EMBEDDED TUTORIAL AND PANEL - Heterogeneous Systems on Chip and Systems in Package
5.5: Novel Directions in Architectural Simulation and Validation
Interactive Presentation
5.6: Power Management
Interactive Presentations
5.7: Advanced Techniques for Embedded Processors Design
Interactive Presentation
6.1: Advances in Potential Power Supply (Ubiquitous Communication and Computation Special Day)
6.2: Best Industrial Systems Designs in Communication and Multimedia
6.3: Nano and FIFO
Interactive Presentation
6.4: System Level Validation
Interactive Presentations
6.5: Model-Based Design for Embedded Systems
Interactive Presentation
6.6: PANEL SESSION - Life Begins at 65 - Unless You Are Mixed Signal
6.7: Resource Optimisation for Best Effort and Quality of Service
7.1: HOT TOPIC - Testing 35 Billions of Transistors in 2020, Is It Possible?
7.2: Designs in Avionics, Military and Space
Interactive Presentations
7.4: Timing Analysis and Validation
7.5: Model-Based Analysis and Middleware of Embedded Systems
Interactive Presentation
7.6: Advanced Architectures for Low Power Optimization
Interactive Presentations
7.7: Performance Analysis for NoC Architectures
Interactive Presentation
8.1: TUTORIAL SESSION - State of the Art (Space and Aeronautics Special Day)
8.2: Secure Systems
8.3: Reliable Microarchitectures
Interactive Presentations
8.4: Formal Techniques to Enhance the Verification Flow
Interactive Presentation
8.5: Interconnect Extraction and Synthesis
Interactive Presentation
8.6: EMBEDDED TUTORIAL/PANEL - A Future of Customizable Processors: Are We There Yet?
8.7: Placement and Floorplanning
9.1.1: HOT TOPIC I - Industrial Applications (Space and Aeronautics Special Day)
9.1.2: LUNCH TIME KEYNOTE - Setting the Industrial Scene (Space and Aeronautics Special Day)
9.2: Crypto Blocks and Security
9.3: Variation Tolerant Mixed Signal Test
Interactive Presentations
9.4: SAT Techniques for Verification
Interactive Presentation
9.5: Compiler Techniques for Customizable Architectures
Interactive Presentations
9.6: Interconnect Optimization and Metastability
9.7: Physical and Device Simulation
Interactive Presentation
10.1: HOT TOPIC II - Development and Industrialization (Space and Aeronautics Special Day)
10.2: Wireless Communication and Networking System Implementation
Interactive Presentation
10.3: Soft Error Evaluation and Tolerance
Interactive Presentation
10.4: EMBEDDED TUTORIAL - EDA - A Pivotal Theme in the European Technology Platforms - ARTEMIS and ENIAC (System)
10.5: Memory and Instruction-Set Customization for Real-Time Systems
10.6: Order Reduction and Variation-Aware Interconnect Modelling
Interactive Presentation
10.7: Temperature and Process Aware Low Power Techniques
Interactive Presentations
11.1: PANEL SESSION - Towards Total Open Source in Aeronautics and Space?
(Space and Aeronautics Special Day)

11.2: Wireless Communication and Networking Algorithms
11.3: System Reliability and Security Issues
11.4: Statistical Timing and Worst-Delay Corner Analysis
11.5: Real-Time Methodologies
11.6: Impact of Nanometer Technologies in MPSoCs and SoC Design
11.7: High-Level Memory and Clock Power Optimization