DATE 2006 SESSION INDEX
Keynote Addresses
1A:
Allocation and Scheduling for MPSoCs and NoCs
1B:
Power Grid and Large Interconnect Network Analysis
Interactive Presentation
1C:
On-Line Testing and Fault Tolerance
Interactive Presentation
1D:
Chip Design Records (System Design Records)
1E:
Embedded Tutorial - Model Based Design and Test
1F:
Transaction Level Modeling Based Validation
2A:
Application-Specific Network on Chip Design
Interactive Presentation
2B:
Methods and Tools for Systematic Analogue Design
Interactive Presentation
2C:
Soft Error Analysis and Concurrent Testing
2D:
System Design Records (System Design Records)
2E:
Application-Specific Architectures
2F:
System Level Performance Analysis
3A:
HOT TOPIC 'Network': the Next 'Big Idea' in Design? Network Paradigms in Systems,
Sensors, and Silicon
3B:
Advances in Verification and Synthesis for Analogue Design Automation
Interactive Presentations
3C:
Advanced SoC Test Scheduling
Interactive Presentation
3D:
Design Methodologies for Emerging Technologies
Interactive Presentations
3E:
Processor and Memory Design
3F:
Spatial and Temporal Mapping for Reconfigurable Computing
4A:
EMBEDDED TUTORIAL - DFM/DFY Design for Manufacturability and Yield - Influence
of Process Variations and Increased Defect Sensitivity in Digital, Analogue and Mixed-Signal
Circuit Design
4B:
Analogue and Mixed-Signal Design
Interactive Presentation
4C:
Processor Self-Test and Fault Diagnosis
Interactive Presentation
4E:
Scheduling for Real-Time and Energy
4F:
System Level Modeling and Simulation
Interactive Presentation
4G:
HOT TOPIC: System Level Design of SoC (4G Wireless Special Day)
5A:
Power-Efficient Hardware/Software Architectures
Interactive Presentation
5B:
Timing and Noise Analysis
Interactive Presentation
5C:
Panel Session - Test and Reliability Challenges in Automotive Microelectronics
5E:
EMBEDDED TUTORIAL AND PANEL - Communication Methods and Networking in
Automotive Systems
5F:
System Level Modelling
Interactive Presentations
5G:
HOT TOPIC: Architectures and NoC (4G Wireless Special Day)
5K:
Keynote
6A:
Low Power Embedded Architectures and Platforms
Interactive Presentation
6B:
Transistor and Gate Level Simulation
Interactive Presentation
6C:
SoC Targeted Mixed-Signal Test Solutions
Interactive Presentation
6E:
System Optimisation with Embedded Software
Interactive Presentations
6F:
Communication-Centric System-Level Synthesis for MPSoC
Interactive Presentation
6G:
HOT TOPIC: Cross Disciplinary Aspects (4G Wireless Special Day)
7A:
Techniques for Architecture Exploration and Characterisation
Interactive Presentations
7B:
Clocks and Routing
7C:
Reliability Issues for Nanotechnology Circuits
Interactive Presentation
7E:
Architectures for Predictable Real-Time Computing and Communication
7F:
Modern Decision Procedures
7G:
TUTORIAL SESSION - Applications, Architectures, Design Methodology and Tools
for MPSoC
7H:
Thermal Aspects of Low Power Design
8A:
Leakage and Dynamic Power Aware Logic Design
Interactive Presentations
8B:
Advanced Topics in Physical Design
8C:
Advances in Defect Modelling and Detection
8E:
Code and Data Layout Optimisations for Embedded Software
Interactive Presentations
8F:
Advanced Reconfigurable Architectures and Applications
8G:
Introduction to and Applications for Wireless Sensor Networks (WSN) - (Wireless
Sensor Networks Special Day)
9A:
Leakage-Aware Circuit Design
9B:
Coverage Based Validation
Interactive Presentation
9C:
Test Data Compression
Interactive Presentations
9E:
Resource Constrained Scheduling
9F:
Sequential Optimisation, Clocking and Boolean Matching
9G:
Design, Verification, Deployment and Test of WSN Systems
9K:
Keynote
10A:
Power Reduction at Circuit Level
10B:
Semi-Formal Validation Methods
Interactive Presentation
10C:
Testing Memories, FPGAs and Networks-on-a-Chip
Interactive Presentation
10E:
Architectural Level Synthesis
Interactive Presentation
10F:
Advances in State Space Exploration
Interactive Presentations
11A:
TUTORIAL AND PANEL SESSION - Low-Power Design Tools: Are EDA Vendors
Taking this Matter Seriously?
11B:
System Level Verification
11C:
Memory Testing and Test Set Improvement
11E:
Reliable Microarchitectures
11F:
Progress in Logic and Arithmetic Circuit Optimisation
11G:
MPSoC Modelling and Design
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