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<co-located-workshops>
<label_wednesday>CW03 Exceeding Reliably the Energy Scaling Limits in Commodity Servers for Edge/Cloud Deployments</label_wednesday>
<room__time_wednesday>Room 9	0830 - 1130</room__time_wednesday>
<persons><role>Organiser:</role>Georgios Karakonstantis, Queen's University Belfast, GB</persons>
<description>Conservative design margins in modern processor/memory chips may guarantee correct execution of the software layers of computing systems under various operating conditions, accounting for the inherent variability among different cores/cells of the same chip, among different manufactured chips and among different workloads; however such margins limit significantly the energy efficiency.
In this workshop, we will present recent methods and studies on design-time voltage/refresh-rate margins characterization and identification in modern multicore CPUs and DRAMs within commodity servers. In addition, we will discuss how such methods can guide informed decisions at the software layers for exceeding the conservative energy scaling limits, while presenting mechanisms at the virtualization (Hypervisor) and resource management (Openstack) layers for ensuring reliable system operation in Edge and Cloud deployments.
The workshop will include talks by IBM Research, ARM, WorldSensing, Queen's University and Universities of Athens, Cyprus and Thessaly revealing challenges and latest results from academia and industry. 
The research presented in this workshop is supported by the Horizon 2020 UniServer project (http://www.uniserver2020.eu/).</description>
<programme></programme>
<label_thursday>CW01 AMASS Open Industrial Workshop</label_thursday>
<room__time_thursday>Room 10	0830 - 1230</room__time_thursday>
<persons><role>Organiser:</role>Jose Luis de la Vara, Universidad Carlos III de Mardrid, ES</persons>
<description>AMASS (https://www.amass-ecsel.eu/) is a H2020-ECSEL R&amp;amp;D project between industry and research organisations that has created and consolidated the de-facto European-wide open tool platform, ecosystem, and self-sustainable community for assurance and certification of safety-critical systems (https://www.polarsys.org/opencert/). The ultimate goal of AMASS is to lower certification costs in face of rapidly changing features and market needs. This has been achieved by establishing a novel holistic and reuse-oriented approach for architecture-driven assurance (fully compatible with standards such as SysML), for multi-concern assurance (for co-analysis and co-assurance of e.g. security and safety aspects), and for seamless interoperability between assurance and engineering activities along with third-party activities (e.g. external assessments and supplier assurance).The workshop is targeted at both practitioners and researchers aiming to gain awareness of the latest advances on cost-effective assurance and certification of safety-critical systems, and of how the corresponding solutions work. We will present practical aspects and concrete application examples of the main AMASS results in two main sessions: Introduction to the AMASS concepts and methodology and Application of the AMASS approach.</description>
<programme></programme>
<label_thursday>CW02 Accelerate real-time high definition video processing designs with Digilent Zybo Z7, a Zynq-7000 AP SoC Platform and Xilinx Vivado HLS</label_thursday>
<room__time_thursday>Room 9	0900 - 1500</room__time_thursday>
<persons><role>Organiser:</role>Cristina Dabacan, Digilent, RO</persons>
<description>Speaker
Elod Gyorgy, FPGA Team leader at Digilent, RO
The workshop aligns with Digilent's mission of providing a hands-on, project-based, open-ended approach to education. Attendees will use Digilent Zybo Z7 (a Xilinx Zynq SoC FPGA platform), PCAM (5MP camera sensor) and Xilinx Vivado HLx to implement a real-time high definition video processing application.
Examples in the workshop materials are based on both high-level programming language (C++) and hardware description language (VHDL). Trainers will demonstrate HLS design flow, IP core usage, simulation and hardware debugging. Participants will leave the workshop with instructional materials and PCAM, 5MP camera sensor so that they can easily adopt this innovative technique in their own courses and projects.
Topics covered:

Explain parallelism and program execution
Introduce Xilinx FPGA Architecture and Vivado HLS
Introduce Digilent Zybo Z7 and PCAM
Accelerate video processing algorithm on Xilinx Vivado
Implement video processing design on Digilent Zybo Z7 and PCAM

Please register here!</description>
<programme></programme>
</co-located-workshops>
