Date: Tuesday 15 March 2016
Time: 14:30 - 16:00
Location / Room: Exhibition Theatre
Organiser:
Hans-Jürgen Brand, IDT/ZMDI, DE
In this session GLOBALFOUNDRIES gives an introduction to the applications of the ultra-low-power technology FDSOI and its innovation potential. The REPARA project will show how to make better use of the advances of new semiconductor technologies for parallel computing architectures, boosting application performance and energy efficiency. Attendees are invited to also visit the ultra-low-power technologies campus and project booths for further details and discussions.
| Time | Label | Presentation Title Authors |
|---|---|---|
| 14:30 | 3.8.1 | GLOBALFOUNDRIES 22FDX INNOVATION POTENTIAL Speaker: Gerd Teepe, GLOBALFOUNDRIES, DE |
| 15:30 | 3.8.2 | REPARA - REENGINEERING AND ENABLING PERFORMANCE AND POWER OF APPLICATIONS Speaker: Imre Pechan, evopro Innovation Kft., HU Abstract In recent years, traditional processors have not been able to translate the advances of silicon fabrication technology into corresponding performance gain due to physical constraints and weaknesses of the sequential programming model. These difficulties have forced a shift from CPU-based homogeneous machines to heterogeneous architectures combining different kinds of computing devices, programmed in a highly parallel fashion yet poorly optimizing the available resources towards performance and low energy consumption. The REPARA project aims to help the transformation and deployment of new and legacy applications in parallel heterogeneous computing architectures while maintaining a balance between application performance, energy efficiency and source code maintainability. The REPARA framework consists of a set of tools assisting the developer in the course of transforming and deploying the source code on heterogeneous platforms, supporting multicore CPU, GPU, DSP as well as reconfigurable FPGA devices. The main contribution of evopro Innovation Kft. to the project is to provide industrial use case applications for evaluating the REPARA methodology and tools. One of the use cases is a typical HPC application called molecular docking, the other one derives from the dynamic railway diagnosis system (eRDM) of evopro. Both of the usem were transformed to various accelerator targets using the REPARA framework. Initial evaluation of the framework shows that considerable performance and energy efficiency improvement can be achieved with low developer intervention for real-world industrial use case applications.
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| 15:50 | 3.8.3 | Q&A |
| 16:00 | End of session Coffee Break in Exhibition Area |