2.8 Revolutionising the Teaching of Computer Architecture and System on Chip Design

Date: Tuesday 15 March 2016
Time: 11:30 - 13:00
Location / Room: Exhibition Theatre

Moderator:
Robert Owen, Imagination Technologies, GB

This special themed exhibition theatre session is for academics teaching Computer Architecture, Verification or System-on-Chip design. Companies with a commercial interest are also welcome.

The real 'industrial' RTL code for a MIPS processor is now freely available for academic use under the Imagination University Programme and is called 'MIPSfpga'. MIPSfpga provides the RTL source code of the MIPS microAptiv UP (microprocessor) core together with teaching materials and reference designs for implementation on an FPGA. The MIPS microAptiv UP core is a member of the same microcontroller family found in many embedded devices, including the popular PIC32MZ micro-controller from Microchip and Samsung's new Artik1.

The session begins with a short overview of Imagination's Worldwide University Programme ("IUP"), and will be presented by Robert Owen, Manager: IUP. Robert is well known in Universities around the world, having specialised in this field for more than 22 years, including the establishment of Texas Instruments' very first program in 1994.

Alex Wong, Technical Systems Analyst from Digilent, will talk about the Digilent educational mission and how they collaborate with Imagination's University Programme to bring the latest technology, including an introduction to the Nexys 4 DDR which can be used with MIPSfpga.

Munir Hasan, Solutions Engineer, will then present and demo MIPSfpga Fundamentals. It is a complete package of teaching materials, including slides, student manual and lab exercises. This package will show how to go from digital design blocks in RTL to Microprocessor to then creating an SoC.

Zubair Kakakhel, Graduate Software Engineer, will present and demo MIPSfpga SoC. Linux is one of the most popular and scalable operating systems in the world. After learning the basics in MIPSfpga Fundamentals, we will now demonstrate how system level design tools such as Vivado IP Integrator can be used to make a complex soft-SoC that is capable of running Linux. We will then switch attention to the software, and show how we port the Linux kernel and Buildroot to run on our soft-SoC based platform. MIPSfpga SoC comes with structured labs that walk through the entire process in an digestible academic format. MIPSfpga SoC gives a genuine "behind the curtain" view of how the semiconductor industry works. Vendors sell various bits of IP blocks which are stitched together by chip manufacturers to make the brains of embedded systems around you.

Additional WORKSHOP

For those who want to go deeper, there's a half-day hands-on workshop at DATE on Wednesday 16th March, 08:30 to 12:30, Seminar Room 1.
- EARLY Registration is recommended! HERE