W10 TRUDEVICE 2015: Workshop on Trustworthy Manufacturing and Utilization of Secure Devices

Agenda

Time	Label	Session
08:30	W10.1	Opening Session
08:30	W10.1.1	TRUDEVICE: Trustworthy Manufacturing and Utilization of Secure Devices Giorgio Di Natale¹, Ilia Polian², Bossuet Lilian³ and Nicolas Sklavos⁴ ¹LIRMM, FR; ²University of Passau, DE; ³University of St. Etienne, FR; ⁴KNOSSOSnet Research Group / Technological Educational Institute of Western Greece, GR
08:45	W10.2	Keynote Talk 1 Chair: Giorgio Di Natale, LIRMM, FR
08:45	W10.2.1	The pros and cons of technological dispersion for security: PUF, TRNG and side-channel countermeasures Jean-Luc Danger, Télécom ParisTech, FR
09:30	W10.3	Session 1 Chair: Bossuet Lilian, University of St. Etienne, FR
09:30	W10.3.1	Analysis and utilization of deviations in RO-PUFs under altered FPGA designs Linus Feiten, Tobias Martin and Bernd Becker, University of Freiburg, DE
09:45	W10.3.2	Ring Oscillators Analysis for FPGA Security Purposes Mario Barbareschi¹, Lionel TORRES² and Giorgio Di Natale³ ¹University of Naples Federico II, IT; ²LIRMM - University Montpellier 2, FR; ³LIRMM, FR
10:00	W10.3.3	Enhanced TERO-PUF design and characterization with FPGA Cedric Marchand, Abdelkarim Cherkaoui and Bossuet Lilian, University of St. Etienne, FR
10:15	W10.3.4	Implementing Reliable Mechanisms for IP Protection on Low-End FPGA devices Mario Barbareschi, Antonio Mazzea and Pierpaolo Bagnasco, University of Naples Federico II, IT
10:30	W10.4	Poster Session 1 Chair: Ilia Polian, University of Passau, DE
10:30	W10.4.1	Functional Locking Modules for Design Protection of Intellectual Property Cores Brice Colombier and Bossuet Lilian, University of St. Etienne, FR
10:30	W10.4.2	3D-NoC protection capabilities and threats: The TSV risk Martha Johanna Sepulveda¹, Guy Gogniat² and Marius Strum¹ ¹University of São Paulo, BR; ²Universite de Bretagne-Sud / Lab-STICC, FR
10:30	W10.4.3	Hardware Trojans in TRNGs Honorio Martin¹, Pedro Paris-Lopez¹, Enrique San Millan¹, Juan E. Tapidor¹ and Nicolas Sklavos² ¹University Carlos III of Madrid, ES; ²KNOSSOSnet Research Group / Technological Educational Institute of Western Greece, GR
10:30	W10.4.4	Development of a Layout-Level Hardware Obfuscation Tool Shweta Malik¹, Georg T. Becker², Christof Paar² and Wayne P. Burleson¹ ¹University of Massachusetts, US; ²Horst Görtz Institute for IT-Security, Ruhr-University Bochum, DE
10:30	W10.4.5	GET - Program for the Generation and Analysis on Nonlinear Elements Stjepan Picek¹ and Lejla Batina² ¹Faculty of Electrical Engineering and Computing, HR; ²Radboud University Nijmegen, NL
10:30	W10.4.6	Why you should care about leading-edge Software Engineering? Tiziana Margaria, University of Limerick (Ireland) and Lero - The Irish Software Research Center, IE
10:30	W10.4.7	Error detection and correction for lightweight cryptographic algorithms Francesco Regazzoni¹, Andrey Bogdanov², Luca Breveglieri³ and Israel Koren⁴ ¹Université catholique de Louvain and ALaRI, CH; ²Technical University of Denmark, DK; ³Polimi, IT; ⁴University of Massachusetts, US
10:30	W10.4.8	Fine grain partial reconfiguration for fault emulation and precise LUT modification L.A. Cardona¹, Bibiana Lorente² and C. Ferrer³ ¹IEEC-UAB, ES; ²CNM-CSIC, ES; ³EEC-UAB, ES
11:30	W10.5	Session 2 Chair: Nicolas Sklavos, KNOSSOSnet Research Group / Technological Educational Institute of Western Greece, GR
11:30	W10.5.1	Hierarchical Secure DfT Mafalda Cortez¹, Said Hamdioui², Giorgio Di Natale³, Marie-Lise Flottes³ and Bruno Rouzeyre³ ¹TU Delft, NL; ²Delft University of Technology, NL; ³LIRMM, FR
12:00	W10.5.2	Integrated Sensors: A Backdoor for Hardware Trojan Activation Xuan-Thuy Ngo, Zakaria Najm, Shivam Bhasin, Sylvain Guilley and Jean-Luc Danger, Télécom ParisTech, FR
13:00	W10.6	Keynote Talk 2 Chair: Ilia Polian, University of Passau, DE
13:00	W10.6.1	Protecting Cryptographic Implementations on Reconfigurable Devices Tim Güneysu, Ruhr University Bochum, DE
13:45	W10.7	Session 3 Chair: Bossuet Lilian, University of St. Etienne, FR
13:45	W10.7.1	Towards Generic Countermeasures Against Fault Injection Attacks Pablo Rauzy and Sylvian Guilley, Télécom ParisTech, FR
14:00	W10.7.2	Analysis of laser-induced errors: RTL fault model versus layout locality characteristics Athanasios Papadimitriou¹, David Hely², Vincent Beroulle², Paolo Maistri³ and Regis Leveugle³ ¹Univ. Grenoble Alpes, LCIS Laboratory, FR; ²Univ. Grenoble Alpes, FR; ³TIMA Laboratory, FR
14:15	W10.7.3	Sensitivity to fault laser injection: a comparison between 28nm bulk and FD-SOI technology Stephan De Castro and Giorgio Di Natale, LIRMM, FR
14:30	W10.7.4	Dynamic Fault Model for Long Duration Laser-Induced Fault Simulation Feng Lu, Giorgio Di Natale, Marie-Lise Flottes and Bruno Rouzeyre, LIRMM, FR
14:30	W10.8	Poster Session 2 Chair: Nicolas Sklavos, KNOSSOSnet Research Group / Technological Educational Institute of Western Greece, GR
14:30	W10.8.1	The Influence of Real-Time Scheduling on Differential Power Analysis Attacks Ke Jiang¹, Lejla Batina², Petru Eles¹ and Zebo Peng¹ ¹Linköping University, SE; ²Radboud University Nijmegen, NL
14:30	W10.8.2	Exploring RNS in the design of improved RSA implementations Juvenal Araujo, Pedro Matutino, Leonel Sousa and Ricardo Chaves, INESC-ID, IST, Universidade de Lisboa, PT
14:30	W10.8.3	CAESAR and NORX - Developing the Future of Authenticated Encryption Jean-Philippe Aumasson¹, Philipp Jovanovic² and Samuel Neves³ ¹Kudelski Security, CH; ²University of Passau, DE; ³University of Coimbra, GR
14:30	W10.8.4	Power and Electromagnetic Analysis for Online Template Attacks Margaux Dugardin¹, Louiza Papachristodoulou², Zakaria Najm¹, Lejla Batina³, Jean-Luc Danger¹, Sylvain Guilley¹, Jean-Christophe Courrege⁴, Anne-Sophie Rivemale⁴ and Carine Therond⁴ ¹Télécom ParisTech, FR; ²Radboud University Nijmegen,, NL; ³Radboud University Nijmegen, NL; ⁴Thales Communications & Security, FR
14:30	W10.8.5	Search Strategy for Fault Injection using Memetic Algorithms Stjepan Picek¹, Pieter Buzing² and Lejla Batina³ ¹Faculty of Electrical Engineering and Computing, HR; ²Riscure BV, NL; ³Radboud University Nijmegen, NL
14:30	W10.8.6	Insights into the Correlation between the Processed Data and its Power Traces Miryam Haber, Binyamin Frankel, Moshe Avital, Itamar Levi, Osnat Keren and Alexander Fish, Bar-Ilan University, IL
14:30	W10.8.7	Tuning of randomized windows against simple power analysis for scalar multiplication on elliptic curves Simon Pontie¹, Paolo Maistri² and Regis Leveugle² ¹University Grenoble Alpes, FR; ²TIMA Laboratory, FR
15:00	W10.9	Session 4 Chair: Giorgio Di Natale, LIRMM, FR
15:00	W10.9.1	Public Key cryptographic primitive design and protection against fault and power analysis attacks Apostolos P. Fournaris and Nicolas Sklavos, KNOSSOSnet Research Group / Technological Educational Institute of Western Greece, GR
15:15	W10.9.2	On the Use of Error Detecting and Correcting Codes to Boost Security in Caches against Side Channel Attacks. Madalin Neagu¹, Salvador Manich² and Liniu Miclea¹ ¹Technical University of Cluj-Napoca, RO; ²Universitat Politecnica de Catalunya, ES
15:30	W10.9.3	A Side-Channel Attack Against Secret Permutation on an Embedded McEliece Cryptosystem Tania Richmond¹, Martin Petrvalsky² and Milos Drutarovsky² ¹Univ. St. Etienne, FR; ²Technical University of Kosic, SK
15:45	W10.10	Session 5 Chair: Nicolas Sklavos, KNOSSOSnet Research Group / Technological Educational Institute of Western Greece, GR
15:45	W10.10.1	Investigating TERO for Hardware Trojan Horse Detection Paris Kitsos¹ and Artemios G. Voyiatzis² ¹Technological Educational Institute of Western Greece, GR; ²ISI, GR
16:00	W10.10.2	Insertion and evaluation of Hardware Trojans in Processors Ioannis Voyiatzis, Costas Efstathiou and Thanos Milidonis, Technological Educational Institute of Athens, GR
16:15	W10.10.3	Security of ICs from Hardware Trojans Georgina Kalogeridou¹, Andrew W. Moore¹, Nicolas Sklavos² and Odysseas Koufopavlou³ ¹Computer Laboratory, University of Cambridge, GB; ²KNOSSOSnet Research Group / Technological Educational Institute of Western Greece, GR; ³University of Patras, GR
16:30	W10.10.4	HINT: Holistic Approaches for Integrity of ICT-Systems Ingrid Verbauwhede and Dave Singelee, KU Leuven and UCLA, BE
16:45	W10.11	Closing Session
16:45	W10.11.1	Conclusions & Outlook: Round Table Giorgio Di Natale¹, Ilia Polian², Bossuet Lilian³ and Nicolas Sklavos⁴ ¹LIRMM, FR; ²University of Passau, DE; ³University of St. Etienne, FR; ⁴KNOSSOSnet Research Group / Technological Educational Institute of Western Greece, GR