W6 MEDIAN - Workshop on Manufacturable and Dependable Multicore Architectures at Nanoscale

Agenda

Time	Label	Session
08:30	W6.1	Opening Session Organisers: Oliver Bringmann, FZI/University of Tuebingen, DE Mehdi Tahoori, Karlsruhe Institute of Technology, DE Chair: Maria K Michael, University of Cyprus, CY Co-Chair: Ozcan Ozturk, Bilkent University, TR Welcoming comments
08:45	W6.2	Keynote Talk
08:45	W6.2.1	Designing Efficient and Reliable Multicore Processors for Networking, Servers, and Beyond Shubu Mukherjee, Cavium Networks, US
09:45	W6.3	Paper Session I: New Challenges at the System Level
09:45	W6.3.1	Multi-Core Emulation for Dependable and Adaptive Systems Prototyping Cristiana Bolchini and Matteo Carminati, Politecnico di Milano, IT
09:45	W6.3.2	Fault-tolerant Routing Approach for 3D Stacked Meshes Masoumeh Ebrahimi, Masoud Daneshtalab and Juha Plosila, University of Turku, FI
10:30	W6	Coffee Break
11:00	W6.4	Paper Session II: Reliability Threads in New Technologies
11:00	W6.4.1	Invited Talk - Steep Slope Devices: Opportunities and Challenges for Processor Design Vijaykrishnan Narayanan, Penn State, US
11:00	W6.4.2	BTI reliability from Planar to FinFET nodes: Will the next node be more or less reliable? Halil Kukner¹, Pieter Weckx², Praveen Raghavan¹, Ben Kaczer¹, Doyoung Jang¹, Francky Catthoor³, Liesbet Van der Perre², Rudy Lauwereins³ and Guido Groeseneken³ ¹IMEC, BE; ²KU Leuven, BE; ³IMEC, KU Leuven, BE
11:00	W6.4.3	*Analysis of Random Dopant Fluctuations and Oxide Thickness on a 16nm L1 Cache Design^)** Cagri Eryilmaz¹, Azam Seyedi², Ozman Unsal³ and Andrian Cristal⁴ ¹Middle Eastern Technical University, TR and Barcelona Supercomputing Center, ES, ; ²Barcelona Supercomputing Center and Universitat Politecnica de Catalunya, ES; ³Barcelona Supercomputing Center, ES; ⁴Barcelona Supercomputing Center, Universitat Politecnica de Catalunya and IIIA-CSIC, ES
12:00	W6	Lunch Break
13:00	W6.5	Paper Session III: Application Specific Solutions
13:00	W6.5.1	FPGA Defect Tolerance based on Equivalent Configurations Generation Parthasarathy M. B. Rao, Abdulazim Amouri and Mehdi B. Tahoori, Karlsruhe Institute of Technology, DE
13:00	W6.5.2	*A Complex Control System for Testing Fault-Tolerance Methodologies^)** Jakub Podivinsky, Marcela Simkova and Zdenek Kotasek, Brno University of Technology, CZ
13:30	W6.6	Panel Session Organiser: Said Hamdioui, TU Delft, NL Chair: Matteo Sonza Reorda, Politecnico di Torino, IT
		Panelists: Speakers: Mehdi Tahoori¹, Oliver Bringmann², Adrian Evans³ and Viacheslav Izosimov⁴ ¹Karlsruhe Institute of Technology, DE; ²FZI/University of Tuebingen, DE; ³iROC, FR; ⁴Semcon, SE
14:30	W6.7	Coffee Break & Poster Session
14:30	W6.7.1	BADR: Boosting Reliability Through Dynamic Redundancy Ihsen Alouani¹, Smail Niar¹, Mazen Saghir² and Fadi Kurdahi³ ¹University of Valenciennes, FR; ²Texas A&M University, QA; ³University of California at Irving, US
14:30	W6.7.2	Automatic Detection and Correction of Defective Pixels for Medical and Space Imagers Eliahu Cohen¹, Moriel Shnitser², Tsvika Avraham², Ofer Hadar² and Yocheved Dotan³ ¹Tel-Aviv University, IL; ²Ben-Gurion University, IL; ³Ruppin Academic Center, IL
14:30	W6.7.3	Implementing Double Error Correction Orthogonal Latin Squares Codes in Xilinx FPGAs Mustafa Demirci¹, Pedro Reviriego² and Juan Antonio Maestro² ¹Alesan, TR; ²Universidad Antonio de Nebrija, ES
14:30	W6.7.4	On Reliability Enhancement Using Adaptive Core Voltage Scaling and Variations on TSMC 28nm LP process process FPGAs Petr Pfeifer and Zdenek Pliva, Technical University of Liberec, CZ
14:30	W6.7.5	Power and Performance Optimization in Long-term Operation André Romão¹, Jorge Semião¹, Carlos Leong², Marcelino Santos³, Isabel Teixeira³ and Paulo Teixeira³ ¹University of Algarve, PT; ²INESC-ID, PT; ³Technical University of Lisbon, PT
15:00	W6.8	Paper Session IV: Resiliency, Self-Test and Self-Diagnosis
15:00	W6.8.1	Invited Talk - DEEP-ER: Scalable resiliency in Exascale Computing Michael Kauschke, Intel, DE
15:00	W6.8.2	Improving the Reliability of Skewed Caches through ECC based Hashes Sercan Yegin¹, Burak Karsli¹, Oguz Ergin¹, Marco Ottavi², Salvatore Pontarelli² and Pedro Reviriego³ ¹TOBB University, TR; ²University of Rome Tor Vergata, IT; ³Universidad Antonio de Nebrija, ES
15:00	W6.8.3	*A new Diagnostic method for VLIW Processors^)** Davide Sabena, Luca Sterpone and Matteo Sonza Reorda, Politecnico di Torino, IT
15:00	W6.8.4	*Aging Monitoring Methodology for Built-In Self-Test Applications^)** João Coelho¹, Jorge Semião¹, Carlos Leong², Marcelino Santos³, Isabel Teixeira³ and Paulo Teixeira³ ¹University of Algarve, PT; ²INESC-ID, PT; ³Technical University of Lisbon, PT
16:15	W6.9	Closing Session

^*)indicates short paper