Date: Wednesday 26 March 2014
Time: 17:00 - 18:30
Location / Room: Konferenz 2
Chair:
Sergio Saponara, University of Pisa, IT
Co-Chair:
Amer Baghdadi, Telecom Bretagne, FR
The session presents energy and performance efficient implementations of wireless communication and financial applications
| Time | Label | Presentation Title Authors |
|---|---|---|
| 17:00 | 8.4.1 | (Best Paper Award Candidate) ENERGY EFFICIENT MIMO PROCESSING: A CASE STUDY OF OPPORTUNISTIC RUN-TIME APPROXIMATIONS Speakers: David Novo1, Nazanin Farahpour1, Ubaid Ahmad2, Francky Catthoor2 and Paolo Ienne1 1EPFL, CH; 2IMEC, BE Abstract Worst-case design is one of the keys to practical engineering: create solutions that can withstand the most adverse possible conditions. Yet, the ever-growing need for higher energy efficiency suggest a grim outlook for worst-case design in the future. In this paper, we propose opportunistic run- time approximations to enable a continuous adaptation of the processing precision (operator type and bitwidth) to the actual execution context without modifying the algorithm functionality. We show that by relaxing the processing precision whenever possible, a VLSI implementation of an advanced wireless receiver algorithm based on opportunistic run-time approximations can save about 40% of the energy consumed by an optimized static implementation. These energy savings are achieved at the expense of a slight increase in overall chip area. |
| 17:30 | 8.4.2 | ENERGY-EFFICIENT FPGA IMPLEMENTATION FOR BINOMIAL OPTION PRICING USING OPENCL Speakers: Valentin Mena Morales1, Pierre-Henri Horrein1, Erik Hochapfel2, Sandrine Vaton3 and Amer Baghdadi1 1Institut Mines-Telecom; Telecom Bretagne; Lab-STICC, FR; 2ADACSYS, FR; 3Institut Mines-Telecom; Telecom Bretagne; IRISA, FR Abstract Energy efficiency of financial computations is a performance criterion that can no longer be dismissed, and is as crucial as raw acceleration and accuracy of the solution. In order to reduce the energy consumption of financial accelerators, FPGAs offer a good compromise with low power consumption and high parallelism. However, designing and prototyping an application on an FPGA-based platform are typically very time-consuming and require significant skills in hardware design. This issue constitutes a major drawback with respect to software-centric acceleration platforms and approaches. A high-level approach has been chosen, using Altera's implementation of the OpenCL standard, to answer this issue. We present two implementations on such a target of the binomial option pricing model on American options. The results obtained on a Terasic DE4 - Stratix IV board form a solid basis to hold all the constraints necessary for a real world application. The best implementation can evaluate more than 2000 options/s with an average power of less than 20W. |
| 18:00 | 8.4.3 | HARDWARE IMPLEMENTATION OF A REED-SOLOMON SOFT DECODER BASED ON INFORMATION SET DECODING Speakers: Stefan Scholl and Norbert Wehn, TU Kaiserslautern, DE Abstract Soft decision decoding of Reed-Solomon codes can largely improve frame errors rates over currently used hard decision decoding. In this paper, we present a new hardware implementation for soft decoding of Reed-Solomon codes based on information set decoding. To our best knowledge this is the first hardware implementation of information set decoding for long Reed-Solomon codes. We propose a reduced complexity version of the decoding algorithm, that is optimized for efficient hardware implementation and enables high throughput. The decoder was implemented on a Virtex 7 FPGA, achieving a gain of 0.75 dB compared to conventional hard decision decoding and a throughput of up to 1.19 GBit/s for the widely used RS(255,239). This gain in FER is achieved with less complexity and more than 15x larger throughput than other state-of-the-art architectures. |
| 18:15 | 8.4.4 | AMBIENT VARIATION-TOLERANT AND INTER COMPONENTS AWARE THERMAL MANAGEMENT FOR MOBILE SYSTEM ON CHIPS Speakers: Francesco Paterna1, Joe Zanotelli2 and Tajana Rosing1 1University of California, San Diego, US; 2Qualcomm Inc., US Abstract In this work we measure and study two key aspects of the thermal behavior of smartphones: 1) thermal interaction between the components on the printed circuit board and 2) the influence of phone's ambient temperature which is subject to large variations. The measurements on the smartphone running typical workloads show that the heat generated by the communication subsystem and the high temperatures on the back cover of the phone can increase the SoC temperature by as much as 17oC. None of the run-time thermal management studies presented to date considered this interaction, as there was no model available. We design a thermal model that captures this thermal dependency and a policy able to avoid thermal emergencies while minimizing the impact on performance. |
| 18:30 | IP4-2, 183 | ENERGY EFFICIENT DATA FLOW TRANSFORMATION FOR GIVENS ROTATION BASED QR DECOMPOSITION Speakers: Namita Sharma1, Preeti Ranjan Panda1, Min Li2, Prashant Agrawal2 and Francky Catthoor2 1Indian Institute of Technology Delhi, IN; 2IMEC, BE Abstract QR Decomposition (QRD) is a typical matrix decomposition algorithm that shares many common features with other algorithms such as LU and Cholesky decomposition. The principle can be realized in a large number of valid processing sequences that differ significantly in the number of memory accesses and computations, and hence, the overall implementation energy. With modern low power embedded processors evolving towards register files with wide memory interfaces and vector functional units (FUs), the data flow in matrix decomposition algorithms needs to be carefully devised to achieve energy efficient implementation. In this paper, we present an efficient data flow transformation strategy for the Givens Rotation based QRD that optimizes data memory accesses. We also explore different possible implementations for QRD of multiple matrices using the SIMD feature of the processor. With the proposed data flow transformation, a reduction of up to 36% is achieved in the overall energy over conventional QRD sequences. |
| 18:31 | IP4-3, 781 | MODE-CONTROLLED DATAFLOW BASED MODELING & ANALYSIS OF A 4G-LTE RECEIVER Speakers: Hrishikesh Salunkhe1, Orlando Moreira2 and Kees van Berkel3 1PhD Candidate, NL; 2Principal DSP Systems Engineer, NL; 3Prof. Dr., NL Abstract Today's smartphones and tablets contain multiple cellular modems to support 2G/3G/4G standards, including Long Term Evolution (LTE). They run on complex multi-processor hardware platforms and have to meet hard real-time constraints. Dataflow modeling can be used to design an LTE receiver. Static dataflow allows a rich set of analysis techniques, but is too restrictive to model the dynamic behavior in many realistic applications, including LTE receivers. Dynamic dataflow allows modeling of many realistic applications, but does not support rigorous temporal analysis. Mode-Controlled Dataflow (MCDF) is a restricted form of dynamic dataflow, and allows the same analysis techniques as static dataflow, in principle. We prove that MCDF is sufficiently expressive to handle the dynamic behavior of a realistic LTE receiver, by systematically and stepwise developing a complete MCDF model for an LTE receiver. |
| 18:30 | End of session | |
| 19:30 | DATE Party in "Gläserne Manufaktur" of the Volkswagen AG The DATE Party is again scheduled on the second conference day, Wednesday, March 26, 2014, starting from 19:30 h. This year, it will take place in one of Dresden's most exciting and modern buildings, the "Gläserne Manufaktur" of the car manufacturer Volkswagen AG (www.glaesernemanufaktur.de/en/). The party will feature a flying buffet style dinner with various catering points and accompanying drinks. Light background music and the possibility of guided visits through the extraordinary premises will round off the evening. It provides a perfect opportunity to meet friends and colleagues in a relaxed atmosphere while enjoying local amenities. Please kindly note that it is no seated dinner. All delegates, exhibitors and their guests are encouraged to attend the party. Please be aware that entrance is only possible with a party ticket. Each full conference registration includes a ticket for the DATE Party. Additional tickets can be purchased on-site at the registration desk (subject to availability of tickets). Ticket price for the full Evening Social Programme: 75 € per person. |