Agenda
Agenda
| Time | Label | Session |
|---|---|---|
| 09:30 | F.1 | Session 1 |
| 09:30 | Post-silicon bugs and industry tools Rand Gray1 and Wisam Kadry2 1Intel Corp, US; 2IBM, IL | |
| 11:00 | F | Coffee Break Monday and Friday morning and afternoon coffee breaks will be located in the Salle de Reception. On Tuesday-Thursday the breaks will be located in the Exhibition Hall. Morning and afternoon (with the exception of Thursday afternoon which is a 30 minute break) coffee breaks on Tuesday-Thursday are extended breaks and will run for 60 minutes (coffee points will be open for the first 30 minutes only) from the start time indicated in the programme. |
| 11:30 | F.2 | Session 2 |
| 11:30 | Post-silicon monitoring infrastructures Valeria Bertacco1 and Sharad Malik2 1University of Michigan, US; 2Princeton University, US | |
| 13:00 | FM1 | Challenges in Design and Qualification for Automotive Electronics Organisers: This is a focused meeting on design and qualification challenges for electronic circuits used in automotive systems. It will be conducted in free format, where practitioners and experts will share state-of-the-art practices and user experiences, and discuss new challenges in this area. Topics likely to be covered include adoption of automotive safe standards, compliance checks and certification processes, IC component vs overall system reliability, time zero screens vs life time failure estimation, firmware qualification and co-design requirements. |
| 13:00 | F | Lunch Break Buffet meal |
| 14:30 | F.3 | Session 3 |
| 14:30 | Bug localization. Microprocessor's solutions Valeria Bertacco1 and Sharad Malik2 1University of Michigan, US; 2Princeton University, US | |
| 16:00 | F | Coffee Break Monday and Friday morning and afternoon coffee breaks will be located in the Salle de Reception. On Tuesday-Thursday the breaks will be located in the Exhibition Hall. Morning and afternoon (with the exception of Thursday afternoon which is a 30 minute break) coffee breaks on Tuesday-Thursday are extended breaks and will run for 60 minutes (coffee points will be open for the first 30 minutes only) from the start time indicated in the programme. |
| 16:30 | F.4 | Session 4 |
| 16:30 | Post-silicon methodologies in the industry Rand Gray1 and Wisam Kadry2 1Intel Corp, US; 2IBM, IL | |
| 19:00 | FM2 | ACM SIGDA / EDAA PhD Forum PhD Forum Committee Chair: PhD Forum Committee Members: The ACM SIGDA / EDAA PhD forum is part of the DATE Conference and hosted by ACM SIGDA and the European Design Automation Association (EDAA). It offers the opportunity for PhD students to present their thesis work to a broad audience in the design, automation and test community from academia and industry. During the presentation at the DATE Conference, it helps students to establish contacts. Also, representatives from industry and academia get a glance of state-of-the-art research in design, automation and test. The review process resulted in the selection of the PhD students listed below. We thank ACM SIGDA, EDAA, and DATE for making this Forum possible. Peter Marwedel (Chair, ACM SIGDA / EDAA PhD Forum at DATE 2013) |
| 19:00 | PhD.1 | Energy Consumption Information in High-level Models Laurent Bousquet, Tima Laboratory, Grenoble, FR |
| 19:00 | PhD.2 | OpenMP extensions to Exploit HW Acceleration on Shared-Memory Many-Core Clusters Paolo Burgio, University of Bologna, IT |
| 19:00 | PhD.3 | Out-of-order Parallel Simulation for Electronic System-Level Design Weiwei Chen, UC Irvine, US |
| 19:00 | PhD.4 | On Efficient Management of Flash Memory for Long Lifetime and High Performance Wang Chundong, National University of Singapore, SG |
| 19:00 | PhD.6 | A Resilient Framework for Post-Silicon Delay Validation of High Performance Circuits Prasanjeet Das, University of Southern California, US |
| 19:00 | PhD.7 | Self-adaptivity of Applications on Network on Chip Multiprocessors: The Case of Fault-Tolerant Kahn Process Networks Onur Derin, University of Lugano, CH |
| 19:00 | PhD.8 | Modeling and Synthesis of the Network in Distributed Embedded Systems Emad Ebeid, University of Verona, IT |
| 19:00 | PhD.9 | Path-based Partitioning Methods for 3D NoCs with Minimal Adaptive Routing Masoumeh Ebrahimi, University of Turku, FI |
| 19:00 | PhD.10 | Architectural Exploration Methods and Tools for Heterogeneous 3D-IC Felipe F. Ferreira, Lyon Institute of Nanotechnology, FR |
| 19:00 | PhD.11 | Working With Adaptive NoC Routers John Jose, IIT Madras, IN |
| 19:00 | PhD.12 | Energy-Aware Multi-Threaded Software Systems: An Overview Steve Kerrison, University of Bristol, UK |
| 19:00 | PhD.13 | On Optimizing Dynamic Memory Allocators Ioannis Koutras, National Technical University of Athens, GR |
| 19:00 | PhD.14 | FPGA-based Hardware Accelerators for Embedded Object Detection Systems Christos Kyrkou, University of Cyprus, CY |
| 19:00 | PhD.15 | Built In Self Test of Pipeline Analog-to-Digital Converters Asma Laraba, Tima Laboratory,Grenoble, FR |
| 19:00 | PhD.16 | Automated Techniques for Verification-driven Design at the Electronic System Level Hoang Le, University of Bremen, DE |
| 19:00 | PhD.17 | High-Speed Interconnect Models with Stochastic Parameter Variability Paolo Manfredi, Politecnico di Torino, IT |
| 19:00 | PhD.18 | Microarchitectures for Hybrid High and Ultra-low Voltage Operation Bojan Maric, Barcelona Supercomputing Center and Universitat Politècnica de Catalunya, ES |
| 19:00 | PhD.19 | Design Entropy Benjamin Menhorn, Ulm University, DE |
| 19:00 | PhD.20 | Formal Methods for Aiding Verification of Local Design Changes in Digital Integrated Circuits Srobona Mitra, IBM India Pvt Ltd, IN |
| 19:00 | PhD.21 | Assertions: From a Mixed-Signal Perspective Subhankar Mukherjee, IIT Kharagpur, IN |
| 19:00 | PhD.22 | Towards Optimized Flexible Multi-ASIP Architectures for LDPC/Turbo Decoding Purushotham Murugappa, Telecom Bretagne, FR |
| 19:00 | PhD.23 | Performance Analysis of Complex Real-Time Applications on Multi-Core Systems with Shared Resources Mircea Negrean, TU Braunschweig, DE |
| 19:00 | PhD.24 | Composable Execution of Mixed-Criticality Embedded Applications With Mixed-Models-of-Computation Ashkan Beyranvand Nejad, Delft University of Technology, NL |
| 19:00 | PhD.25 | Composable Application-level Power Management for Real-Time Embedded Systems Andrew Nelson, Delft University of Technology, NL |
| 19:00 | PhD.26 | RSSI-based Localisation of Mobile Robots With Online Channel Estimation Luis Olivera, University of Porto, PT |
| 19:00 | PhD.27 | Improving Performance of FPGAs Using Resistive Switching Memory (RRAM) Based Low Power Circuit Architectures Santhosh Onkaraiah, CEA-Leti, Minatec, FR |
| 19:00 | PhD.28 | Capacity Metric for Chip Heterogeneous Multiprocessors Mwaffaq Otoom, Yarmouk University, JO |
| 19:00 | PhD.29 | System-Level Approaches for Fixed-Point Refinement of Signal Processing Algorithms Karthik Parashar, INRIA Bretagne Atlantique, Rennes, FR |
| 19:00 | PhD.30 | Model Checking Memory-Related Properties of SystemC Transaction Level Designs Marcel Pockrandt, TU Berlin, DE |
| 19:00 | PhD.31 | Soft Error Mitigation in Asynchronous Networks on Chip Julian Pontes, Universidade Católica do Rio Grande do Sul, BR |
| 19:00 | PhD.32 | A Reconfigurable Low-Latency Architecture for Real-Time Image and Video Processing Paulo Possa, University of Mons, BE |
| 19:00 | PhD.33 | Thread Assignment of Network Applications in Multithreaded Processors: A Statistical Approach Petar Radojkovic, Barcelona Super Computer Center, ES |
| 19:00 | PhD.34 | Reliable Software for Unreliable Hardware Semeen Rehman, Karlsruhe Institute of Technology, DE |
| 19:00 | PhD.35 | Verification of Hybrid DEVS Models Hesham Saadawi, Carleton University, Ottawa, CA |
| 19:00 | PhD.36 | MiMAPT: Adaptive Multi-Resolution Thermal Analysis at RT and Gate Level Mohammadsadegh Sadri, University of Bologna, IT |
| 19:00 | PhD.38 | Variability, Regularity and DFM Metrics Kasyab Parmesh Subramaniyan, Chalmer University, SE |
| 19:00 | PhD.40 | Disparity Estimation Hardware Architectures and Design Techniques for Embedded Stereo Vision Applications Christos Ttofis, University of Cyprus, CY |
| 19:00 | PhD.42 | Low Power and High Performance Current Mode On-Chip Interconnect System Design and Optimization Xinsheng Wang, Harbin Institute of Technology, Harbi, CN |
| 13:00 | FM3 | IEEE European Test Technology Technical Council (ETTTC) Meeting Organiser: |
| 18:30 | FM4 | EDAA General Assembly Organiser: |
| 18:30 | FM5 | 27. European SystemC Users' Group Meeting Organiser: The European SystemC Users' Group (ESCUG) announces its 27th meeting at DATE Conference 2013 on Tuesday, March 19th, 2013, 18:30 h (closing 21:30 h). The 27th European SystemC Users' Group Meeting encompasses not only SystemC but the wider picture of Accellera standards and technologies, such as UVM, SystemVerilog, SVA, and IP-XACT. This meeting will be organized in town hall style, giving experts from Accellera a platform to introduce these design and verification technologies and providing the audience an opportunity to join interesting discussion. Please register here [1]. We're looking forward to meeting you in Grenoble! |
| 18:30 | FM1.1 | Opening and Welcome Oliver Bringmann, University of Tuebingen, DE |
| 18:45 | FM1.2 | Accellera News Update Dennis Brophy, Accellera Systems Initiative, US |
| 19:15 | FM1.3 | Accellera Systems Initiative Presentstion Dennis Brophy1, Martin Barnasconi2 and Laurent Maillet-Contoz3 1Accellera Systems Initiative, US; 2Accellera Systems initiative, NL; 3Accellera Systems Initiative, FR |
| 20:15 | FM1.4 | Interactive Discussion |
| 21:15 | FM1.5 | Wrap-Up and Closing Oliver Bringmann, University of Tuebingen, DE |