Date: Wednesday 20 March 2013
Time: 11:00 - 12:30
Location / Room: Lesdigiueres (Exhibition Theatre)
Organiser:
Jürgen Haase, edacentrum, DE
Chair:
Thomas Reppe, Silicon Saxony, DE
Four of the leading European micro- and nanoelectronics regions are joining their research, development and production expertise to form the transnational, research-driven cluster "Silicon Europe - The Leaders for Energy Efficient ICT Electronics". The cluster partners from Germany, Belgium, France and the Netherlands are linked by a common goal: They aim to secure and expand Europe's position as the world's leading center for energy efficient micro- and nanoelectronics and information and communications technology (ICT). In order to reach this goal, Silicon Saxony (Dresden/Germany), DSP Valley (Belgium), Minalogic (Grenoble/France) and High Tech NL (Eindhoven/Netherlands) are cooperating in research, development and business expertise. Together they represent about 800 research institutes and companies, which account for more than 150,000 jobs; among the companies are global market leaders such as Philips, NXP, Globalfoundries, Infineon, STMicroelectronics, Schneider Electric und Thales. This makes Silicon Europe one of the largest technology clusters of the world.
| Time | Label | Presentation Title Authors |
|---|---|---|
| 11:00 | 6.8.1 | SILICON EUROPE - CLUSTER ALLIANCE FOR EUROPEAN MICRO- AND NANOELECTRONICS INDUSTRY - TOPICS, CHALLENGES, OPPORTUNITIES Author: Thomas Reppe, Silicon Saxony, DE Abstract |
| 11:20 | 6.8.2 | MINALOGIC: FROM RESEARCH TO INDUSTRY Author: Jean Chabbal, Minalogic, FR Abstract |
| 11:35 | 6.8.3 | SILICON SAXONY - A HIGH TECH LOCATION OF GREAT DIVERSITY Author: Andreas Brüning, Silicon Saxony, DE Abstract |
| 11:50 | 6.8.4 | THE DUTCH SEMICON CLUSTER: A COMPLETE VALUE CHAIN Author: Ben van der Zon, High Tech NL, NL Abstract |
| 12:05 | 6.8.5 | DSP VALLEY - REGION OF EXCELLENCE IN EMBEDDED SIGNAL PROCESSING SYSTEMS DESIGN Author: Peter Simkens, DSP Valley, BE Abstract |
| 12:20 | 6.8.6 | PANEL Authors: Thomas Reppe1, Jean Chabbal2, Andreas Brüning1, Ben van der Zon3 and Peter Simkens4 1Silicon Saxony, DE; 2Minalogic, FR; 3High Tech NL, NL; 4DSP Valley, BE Abstract |
| 12:30 | End of session Lunch Break in Ecrins Sandwich lunch (Eat early for High-Performance Low-Power Computing - Energy Efficient Computing Keynote - Room Oisans at 1330; http://www.date-conference.com/conference/session/7.0) |