Technical Programme Committee 2012

Printer-friendly version PDF version

Topic: T2 Test Generation, Simulation and Diagnosis

Test pattern generation; high-level TPG; delay TPG; fault simulation; test generation for validation, debug and diagnosis; low-power TPG; TPG for memories and FPGAs.

Chair: Nicola Nicolici, McMaster University, CA, Contact

Co-Chair: Grzegorz Mrugalski, Mentor Graphics Poland, PL, Contact

Members:

  • Bernd Becker, University of Freiburg, DE, Contact
  • Seiji Kajihara, Kyushu Institute of Technology, JP, Contact
  • frank [dot] poehlatintel [dot] com, Contact
  • matteo sonza reorda, politecnico di torino - DAUIN, IT, Contact
  • Arnau Virazel, LIRMM / Univ. Montpellier, FR, Contact